Patents by Inventor Sudhir Kudva
Sudhir Kudva has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11144080Abstract: High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.Type: GrantFiled: December 20, 2019Date of Patent: October 12, 2021Assignee: NVIDIA Corp.Inventors: Sudhir Kudva, John Wilson
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Patent number: 10901823Abstract: A system and method to balance computational loads across multiple computing systems, such as servers in a server cluster, is disclosed. The system includes a load balancer. Upon receiving a new computing request corresponding to an expected throughout, the load balancer identifies a computing system that is most likely to fail and sends the new computing request to a different computing system. The load balancer uses a mutational algorithm to identify potentially problematic throughputs for a given computing system in a given state. The mutational algorithm is used to determine latency-throughput curves that are fit to a data population that includes many diverse data points with relatively high slopes in a 2D latency-throughput space.Type: GrantFiled: December 20, 2018Date of Patent: January 26, 2021Assignee: Accenture Global Solutions LimitedInventors: Yashaswi Poorlupadi, Veera Venkatasatyanagaganesh Metla, Chandrashekar Sadashivappa Gunjiganur, Dhireshwar Mishra, Sudhir Kudva
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Patent number: 10762678Abstract: A device may generate, based on receiving feeder content, a structured format of the feeder content. The device may generate, based on the structured format of the feeder content, one or more semantic mappings for the feeder content. The device may generate, based on the one or more semantic mappings for the feeder content, an electronic storyboard of the feeder content. The device may generate an extended reality rendered content feed based on the electronic storyboard of the feeder content. The device may provide the extended reality rendered content feed to an extended reality device.Type: GrantFiled: October 4, 2018Date of Patent: September 1, 2020Assignee: Accenture Global Solutions LimitedInventors: Sunjeet Gupta, Rahul Mantri, Asheesh Gupta, Inderjit Singh, Sudhir Kudva Karkale, Shridhar Rajgopalan
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Publication number: 20200264642Abstract: High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.Type: ApplicationFiled: December 20, 2019Publication date: August 20, 2020Applicant: NVIDIA Corp.Inventors: Sudhir Kudva, John Wilson
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Publication number: 20200201695Abstract: A system and method to balance computational loads across multiple computing systems, such as servers in a server cluster, is disclosed. The system includes a load balancer. Upon receiving a new computing request corresponding to an expected throughout, the load balancer identifies a computing system that is most likely to fail and sends the new computing request to a different computing system. The load balancer uses a mutational algorithm to identify potentially problematic throughputs for a given computing system in a given state. The mutational algorithm is used to determine latency-throughput curves that are fit to a data population that includes many diverse data points with relatively high slopes in a 2D latency-throughput space.Type: ApplicationFiled: December 20, 2018Publication date: June 25, 2020Inventors: Yashaswi Poorlupadi, Veera Venkatasatyanagaganesh Metla, Chandrashekar Sadashivappa Gunjiganur, Dhireshwar Mishra, Sudhir Kudva
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Publication number: 20200111242Abstract: A device may generate, based on receiving feeder content, a structured format of the feeder content. The device may generate, based on the structured format of the feeder content, one or more semantic mappings for the feeder content. The device may generate, based on the one or more semantic mappings for the feeder content, an electronic storyboard of the feeder content. The device may generate an extended reality rendered content feed based on the electronic storyboard of the feeder content. The device may provide the extended reality rendered content feed to an extended reality device.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventors: Sunjeet GUPTA, Rahul MANTRI, Asheesh GUPTA, Inderjit SINGH, Sudhir KUDVA KARKALE, Shridhar RAJGOPALAN
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Patent number: 10558230Abstract: High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.Type: GrantFiled: September 19, 2018Date of Patent: February 11, 2020Assignee: NVIDIA Corp.Inventors: Sudhir Kudva, John Wilson
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Publication number: 20190250657Abstract: High-resolution switched digital regulators are disclosed having fast cross corner and variable temperature response, with constrained ripple. The strength of the power transistors utilized by the regulator are adjusted to control the current delivered to the load. The regulators utilize a slow control loop in parallel with a primary fast switching loop. The slow loop uses the switching signal of the primary loop to estimate the load current and set the power transistor size accordingly.Type: ApplicationFiled: September 19, 2018Publication date: August 15, 2019Inventors: Sudhir Kudva, John Wilson
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Patent number: 9772919Abstract: An electronic control unit (ECU) is tested by an automated D-bus testing tool in a first device. The test tool establishes one or more secure shells between the first device and the ECU. The tool reads test input data from an Excel input file. The ECU comprises a software stack including a test client, a Bluetooth middle layer and a hardware abstraction layer, that communicate internally relative to the ECU, via a D-bus. The test tool sends function calls and parameters via the secure shells to the ECU to test execution of Bluetooth functions and/or Bluetooth profiles. The function calls enable simulation of a human machine interface by the test client. The tool monitors API call returns and logs D-bus communications via the one or more secure shells. The test tool outputs test verdict information and/or D-bus communication logs as text in an Excel file.Type: GrantFiled: March 14, 2013Date of Patent: September 26, 2017Assignee: Accenture Global Services LimitedInventors: Vidya Rajagopal, Divya Kilari Chandrababu naidu, Marin Grace, Sudhir Kudva
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Publication number: 20140278199Abstract: An electronic control unit (ECU) is tested by an automated D-bus testing tool in a first device. The test tool establishes one or more secure shells between the first device and the ECU. The tool reads test input data from an Excel input file. The ECU comprises a software stack including a test client, a Bluetooth middle layer and a hardware abstraction layer, that communicate internally relative to the ECU, via a D-bus. The test tool sends function calls and parameters via the secure shells to the ECU to test execution of Bluetooth functions and/or Bluetooth profiles. The function calls enable simulation of a human machine interface by the test client. The tool monitors API call returns and logs D-bus communications via the one or more secure shells. The test tool outputs test verdict information and/or D-bus communication logs as text in an Excel file.Type: ApplicationFiled: March 14, 2013Publication date: September 18, 2014Applicant: Accenture Global Services LimitedInventors: Vidya Rajagopal, Divya Kilari Chandrababu naidu, Marin Grace, Sudhir Kudva