Patents by Inventor Sudipta Kumar Ray

Sudipta Kumar Ray has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9433105
    Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.
    Type: Grant
    Filed: August 25, 2009
    Date of Patent: August 30, 2016
    Assignee: International Business Machines Corporation
    Inventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
  • Publication number: 20110048790
    Abstract: An electrically insulating substrate is provided. The electrically insulating substrate includes a set of areas to be formed into a set of printed circuit boards. Each of the set of areas is separated from others of the set of areas by a dicing channel. A set of signal wiring conductors is fabricated onto the set of areas of the electrically insulating substrate so that at least one of the set of signal wiring conductors terminates proximate to the dicing channel. A set of plated through holes is fabricated through at least one of the set of areas such that at least one of the set of plated through holes connects to at least one of the set of signal wiring conductors. The electrically insulating substrate is singulated along a set of singulation lines to form the set of printed circuit boards. The singulation lines intersect with the plated through holes, so that a portion of the plated through holes is exposed along the peripheral edge of the resulting printed circuit boards.
    Type: Application
    Filed: August 25, 2009
    Publication date: March 3, 2011
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Richard Stephen Graf, Thomas Edward Lombardi, Sudipta Kumar Ray, David Justin West
  • Patent number: 6559527
    Abstract: A method of forming non-spherically shaped solder interconnects, preferably conical, for attachment of electronic components in an electronic module. Preferably, the solder interconnects of the present invention are cone shaped and comprise of depositing a first solder followed by a second solder having a lower reflow temperature than the first solder. Warm placement of the electronic component at a somewhat elevated temperature than room temperature but less than the solder reflow temperature reduces the force required during placement of a semiconductor chip to a substrate. After warm placement, reflow of the module occurs at the lower reflow temperature of the second solder. The conical shape of the solder interconnects are formed by a heated coining die which may also coin a portion of the interconnects with flat surfaces for stand-offs.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: May 6, 2003
    Assignee: International Business Machines Corporation
    Inventors: Peter Jeffrey Brofman, Shaji Farooq, John U. Knickerbocker, Scott Ira Langenthal, Sudipta Kumar Ray, Kathleen Ann Stalter
  • Patent number: 6502999
    Abstract: An opto-electronic module is housed in a hermetically sealed housing which is fabricated on a base member of solderable material to which a side wall structure is soldered. A cover is similarly provided that either is soldered to the top open end of the housing at the edge of the housing wall structure or is a cup-shaped member that slides over the wall structure and is soldered at the juxtaposed faces of the walls of the cover and the wall structure. Overlapping slots co-align to form a passage through which optical fibers may pass through the walls. The hermetic seal of the housing prevents the internal contamination of the module by water vapor, particulate matter or other contaminants.
    Type: Grant
    Filed: September 4, 2001
    Date of Patent: January 7, 2003
    Assignee: JDS Uniphase Corporation
    Inventors: Mitchell Simmons Cohen, David Peter Gaio, William K. Hogan, Steven Paul Ostrander, Sudipta Kumar Ray, Jeannine Madelyn Trewhella
  • Patent number: 6395991
    Abstract: Structure and method for reinforcing a solder column grid array attachment of a ceramic or the like substrate to a printed circuit board, the reinforcement providing support for a heat sink which is bonded or affixed by pressure to a structural element of the substrate. In one form, the invention involves the concurrent formation of materially larger solder columns along the perimeter of the substrate in conjunction with the array of thin electrically interconnecting solder columns on the substrate. The reinforcing and electrical signal columns are thereafter aligned and attached by solder reflow to a corresponding pattern of pads on the printed circuit board. The heat sink is thermally connected to a structural element of the substrate by bonding or mechanical compression. Stresses in the solder columns caused by heat sink compressive forces or vibration induced flexing are materially decreased without adding complex or unique manufacturing operations.
    Type: Grant
    Filed: July 29, 1996
    Date of Patent: May 28, 2002
    Assignee: International Business Machines Corporation
    Inventors: Robert Charles Dockerty, Ronald Maurice Fraga, Ciro Neal Ramirez, Sudipta Kumar Ray, Gordon Jay Robbins
  • Patent number: 6259155
    Abstract: A ceramic column grid array package suitable for mounting application specific integrated circuits or microprocessor chips onto a printed circuit board employing polymer reinforced columns on the substrate module is described. The polymer enhancement is formed by coating a thin conformal film of a polymer, such as, a polyimide onto the substrate module after the formation of the ceramic column grids to mechanically enhance the column to substrate attachment of the column to the substrate prior to mounting on a printed circuit card. Upon curing of the polymer film at a temperature below the melting point of the solder bond attaching the column grid to the substrate, the columns will be mechanically reinforced in their attachment to the substrate. Upon removal of the substrate module from a printed circuit card during rework, the columns of the grid array will remain with the substrate module, leaving no columns on the printed circuit card.
    Type: Grant
    Filed: April 12, 1999
    Date of Patent: July 10, 2001
    Assignee: International Business Machines Corporation
    Inventors: Mario John Interrante, Raymond Alan Jackson, Sudipta Kumar Ray, Paul A. Zucco, Scott R. Dwyer
  • Patent number: 6226863
    Abstract: A device and method for enabling the reworkability of an integrated circuit comprising a wirebond chip having a bottom surface and a carrier substrate having a first surface and a second surface. The first surface and second surface of the carrier substrate are electrically connected through a series of vias. A bonding agent is used to mechanically attach the wirebond chip to the carrier substrate in addition to wirebonds for electrically connecting the wirebond chip to the substrate. The substrate is attached to a multi-chip module (MCM) by ball grid array (BGA) or controlled collapse chip connection (C4) attaching process.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: May 8, 2001
    Assignee: International Business Machines Corporation
    Inventors: Mukta Shaji Farooq, Raymond Alan Jackson, Sudipta Kumar Ray
  • Patent number: 6184062
    Abstract: A method of forming non-spherically shaped solder interconnects, preferably conical, for attachment of electronic components in an electronic module. Preferably, the solder interconnects of the present invention are cone shaped and comprise of depositing a first solder followed by a second solder having a lower reflow temperature than the first solder. Warm placement of the electronic component at a somewhat elevated temperature than room temperature but less than the solder reflow temperature reduces the force required during placement of a semiconductor chip to a substrate. After warm placement, reflow of the module occurs at the lower reflow temperature of the second solder. The conical shape of the solder interconnects are formed by a heated coining die which may also coin a portion of the interconnects with flat surfaces for stand-offs.
    Type: Grant
    Filed: January 19, 1999
    Date of Patent: February 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Peter Jeffrey Brofman, Shaji Farooq, John U. Knickerbocker, Scott Ira Langenthal, Sudipta Kumar Ray, Kathleen Ann Stalter
  • Patent number: 6053394
    Abstract: Structure and method for reinforcing a solder column grid array attachment of a ceramic or the like substrate to a printed circuit board, the reinforcement providing support for a heat sink which is bonded or affixed by pressure to a structural element of the substrate. In one form, the invention involves the concurrent formation of materially larger solder columns along the perimeter of the substrate in conjunction with the array of thin electrically interconnecting solder columns on the substrate. The reinforcing and electrical signal columns are thereafter aligned and attached by solder reflow to a corresponding pattern of pads on the printed circuit board. The heat sink is thermally connected to a structural element of the substrate by bonding or mechanical compression. Stresses in the solder columns caused by heat sink compressive forces or vibration induced flexing are materially decreased without adding complex or unique manufacturing operations.
    Type: Grant
    Filed: January 13, 1998
    Date of Patent: April 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Robert Charles Dockerty, Ronald Maurice Fraga, Ciro Neal Ramirez, Sudipta Kumar Ray, Gordon Jay Robbins
  • Patent number: 6015955
    Abstract: A device and method for enabling the reworkability of an integrated circuit. The device includes a wirebond chip having a bottom surface and a carrier substrate having a first surface and a second surface. The first surface and second surface of the carrier substrate are electrically connected through a series of vias. A bonding agent is used to mechanically attach the wirebond chip to the carrier substrate in addition to wirebonds for electrically connecting the wirebond chip to the substrate. The substrate is attached to a multi-chip module (MCM) by ball grid array (BGA) or controlled collapse chip connection (C4) attaching process.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: January 18, 2000
    Assignee: International Business Machines Corporation
    Inventors: Mukta Shaji Farooq, Raymond Alan Jackson, Sudipta Kumar Ray
  • Patent number: 5796169
    Abstract: Supporting structure for a ball grid array surface mounted integrated circuit device composed of support solder formed at selective corner locations on the ball grid array surface of the integrated circuit device. In one form, L-shaped patterns of high melting temperature solder are formed along the axes defined by the ball grid array and are characterized in that cross sections of the L-shaped pattern match that of the solder balls along one axis, and represent a continuum of solder between solder ball locations along the other axis. Support solder can be added where necessary to provide both structural reinforcement and thermal conduction. Control of the cross section of the support solder ensures that surface tension effects of the molten low temperature reflow solder used to connect the integrated circuit device does not materially change the final relative spacing between the integrated circuit device balls and the underlying printed circuit board contacts.
    Type: Grant
    Filed: November 19, 1996
    Date of Patent: August 18, 1998
    Assignee: International Business Machines Corporation
    Inventors: Robert Charles Dockerty, Ronald Maurice Fraga, Ciro Neal Ramirez, Sudipta Kumar Ray, Charles Levern Reynolds, Jr., Gordon Jay Robbins