Patents by Inventor Suhail Ahmed
Suhail Ahmed has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11394775Abstract: A mechanism is described for facilitating dynamic storage management for computing mobile devices according to one embodiment. A method of embodiments, as described herein, includes detecting context-aware data relating to a computing device and a user associated with the computing device, monitoring available space at a local storage of the computing device, and dynamically allocating portions of the space at the local storage based on the context-aware data and results of the monitoring of the space. The dynamic allocation may include providing a first portion of the space to a first content by moving a second content from the local storage to one or more remote storage devices.Type: GrantFiled: September 4, 2013Date of Patent: July 19, 2022Assignee: INTEL CORPORATIONInventors: Sridhar Mahankali, Suhail Ahmed, Rita H. Wouhaybi, Brian D. Brougham
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Patent number: 10417445Abstract: Technologies are presented that provide context-aware privacy metering regarding establishments, such as consumer establishments. A method of rating privacy of one or more establishments may include receiving a location designation of a user device from the user device (automatically or via user input), obtaining privacy-related information regarding one or more establishments in proximity of the location designation, and generating one or more privacy score vector algorithms for the one or more establishments based on the privacy-related information regarding the one or more establishments. The method may further include obtaining a privacy profile of the user, determining one or more privacy scores for the one or more establishments by applying the privacy profile of the user to the one or more privacy score vector algorithms. The method may further include generating and providing a privacy-related recommendation regarding a particular establishment.Type: GrantFiled: December 23, 2013Date of Patent: September 17, 2019Assignee: Intel CorporationInventors: Rita H. Wouhaybi, Sridhar Mahankali, Suhail Ahmed, Brian Brougham
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Patent number: 10248750Abstract: According to one general aspect, a method may include receiving a digital circuit model. The digital circuit model may include models of a clock mesh configured to provide a clock signal to a plurality of logic circuits, and a plurality of logic circuits, each logic circuit at least partially controlled by an application of the clock signal to one or more clock-gater cells. The method may include identifying a group of clock-gater cells having common input signals. The method may include calculating at least one clustered sub-portion of the group of clock-gater cells based upon a set of bounding dimensions, wherein each clustered sub-portion includes a plurality of clock-gater cells. The method may further include, for each clustered sub-portion, de-cloning in the digital circuit model the clock-gater cells by reducing the clock-gater cells to a new clock-gater cell and replacing the each clock-gater cell with a matching buffer cell.Type: GrantFiled: January 11, 2016Date of Patent: April 2, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Brian Millar, Suhail Ahmed, Rajesh Kashyap
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Patent number: 9779201Abstract: According to one general aspect, a method may include receiving a digital circuit model that includes models of a clock mesh and a plurality of logic circuits, each logic circuit associated with end-points of the logic circuit. The method may also include identifying a cluster of end-points, wherein the cluster is associated with a common version of the clock signal. The method may also include identifying an associated skew-schedule for each end-point. The method may include determining a timing slack and skew schedule for each end-point within the cluster. The method may include adjusting a clock-gater cell, based upon a common push/pull schedule associated with the cluster. The method may further include inserting, for at least one end-point of the cluster, a skew-buffer, wherein a variant of the skew-buffer for a respective end-point is based upon a difference between the end-point's skew schedule and the common push/pull schedule.Type: GrantFiled: April 14, 2015Date of Patent: October 3, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Brian Millar, Ahsan Chowdhury, Suhail Ahmed, Matthew Berzins, Jinkyu Lee
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Publication number: 20160328507Abstract: According to one general aspect, a method may include receiving a digital circuit model. The digital circuit model may include models of a clock mesh configured to provide a clock signal to a plurality of logic circuits, and a plurality of logic circuits, each logic circuit at least partially controlled by an application of the clock signal to one or more clock-gater cells. The method may include identifying a group of clock-gater cells having common input signals. The method may include calculating at least one clustered sub-portion of the group of clock-gater cells based upon a set of bounding dimensions, wherein each clustered sub-portion includes a plurality of clock-gater cells. The method may further include, for each clustered sub-portion, de-cloning in the digital circuit model the clock-gater cells by reducing the clock-gater cells to a new clock-gater cell and replacing the each clock-gater cell with a matching buffer cell.Type: ApplicationFiled: January 11, 2016Publication date: November 10, 2016Inventors: Brian MILLAR, Suhail AHMED, Rajesh KASHYAP
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Publication number: 20160117434Abstract: According to one general aspect, a method may include receiving a digital circuit model that includes models of a clock mesh and a plurality of logic circuits, each logic circuit associated with end-points of the logic circuit. The method may also include identifying a cluster of end-points, wherein the cluster is associated with a common version of the clock signal. The method may also include identifying an associated skew-schedule for each end-point. The method may include determining a timing slack and skew schedule for each end-point within the cluster. The method may include adjusting a clock-gater cell, based upon a common push/pull schedule associated with the cluster. The method may further include inserting, for at least one end-point of the cluster, a skew-buffer, wherein a variant of the skew-buffer for a respective end-point is based upon a difference between the end-point's skew schedule and the common push/pull schedule.Type: ApplicationFiled: April 14, 2015Publication date: April 28, 2016Inventors: Brian MILLAR, Ahsan CHOWDHURY, Suhail AHMED, Matthew BERZINS, Jinkyu LEE
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Publication number: 20150235050Abstract: Technologies are presented that provide context-aware privacy metering regarding establishments, such as consumer establishments. A method of rating privacy of one or more establishments may include receiving a location designation of a user device from the user device (automatically or via user input), obtaining privacy-related information regarding one or more establishments in proximity of the location designation, and generating one or more privacy score vector algorithms for the one or more establishments based on the privacy-related information regarding the one or more establishments. The method may further include obtaining a privacy profile of the user, determining one or more privacy scores for the one or more establishments by applying the privacy profile of the user to the one or more privacy score vector algorithms. The method may further include generating and providing a privacy-related recommendation regarding a particular establishment.Type: ApplicationFiled: December 23, 2013Publication date: August 20, 2015Inventors: Rita H. Wouhaybi, Sridhar Mahankali, Suhail Ahmed, Brian Brougham
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Publication number: 20140176215Abstract: To implement a clock skew in an integrated circuit, end-point circuits are grouped into a push group and a pull group based on target latencies of local clock signals respectively driving the end-point circuits. The push group is driven by slow clock gates, and the pull group is driven by fast clock gates. The slow clock gates are determined such that delays of output clock signals are aligned to a base latency. The fast clock gates are determined such that delays of output clock signals are aligned to a minimum pull latency smaller than the base latency. Buffer networks are disposed between the fast and slow clock gates and the end-point circuits such that the local clock signals have the target latencies, respectively.Type: ApplicationFiled: December 21, 2012Publication date: June 26, 2014Applicant: Samsung Electronics Co., Ltd.Inventors: Suhail AHMED, Ahsan Chowdhury, Brian Millar
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Patent number: 7540028Abstract: Methods and apparatus for loading a security algorithm in a fast path of a network processor are disclosed. In an example method, a network processor generates a statistic associated with a plurality of communication packets received by the network processor, determines a security attack on the network processor is in progress based on the statistic and loads the security algorithm in the fast path of the network processor.Type: GrantFiled: October 25, 2002Date of Patent: May 26, 2009Assignee: Intel CorporationInventors: Suhail Ahmed, Erik J. Johnson, Manasi Deval
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Patent number: 7453797Abstract: A method to provide high availability in network elements using distributed architectures. The method employs multiple software components that are distributed across data/forwarding plane and control plane elements in a network element. The software components in the data/forwarding plane include active and standby components. Components in the control plane a re provided to communicate with the components in the data/forwarding plane. A keep-alive messaging mechanism is used to monitor operation of the various elements in the network element. Upon detection of a failure to a hardware or software component, the data/forwarding plane and/or control plane elements are reconfigured, as applicable, to replace a failed active component with a corresponding standby component. This enables the network element to be reconfigured in a manner that is transparent to other network elements, and provided high availability for the network element.Type: GrantFiled: September 29, 2004Date of Patent: November 18, 2008Assignee: Intel CorporationInventors: Manasi Deval, Suhail Ahmed, Santosh Balakrishnan, Hormuzd Khosravi, Sanjay Bakshi
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Publication number: 20060224883Abstract: A programming interface for Secure Socket Layer (SSL) abstracts manipulation, e.g., configuration and management, of SSL tables based upon an SSL implementation model. The SSL tables can be provided in a forwarding plane. A programming interface for server load balancing (SLB) abstracts configuration and management of SLB tables.Type: ApplicationFiled: March 30, 2005Publication date: October 5, 2006Inventors: Hormuzd Khosravi, Suhail Ahmed
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Publication number: 20060072480Abstract: A method to provide high availability in network elements using distributed architectures. The method employs multiple software components that are distributed across data/forwarding plane and control plane elements in a network element. The software components in the data/forwarding plane include active and standby components. Components in the control plane are provided to communicate with the components in the data/forwarding plane. A keep-alive messaging mechanism is used to monitor operation of the various elements in the network element. Upon detection of a failure to a hardware or software component, the data/forwarding plane and/or control plane elements are reconfigured, as applicable, to replace a failed active component with a corresponding standby component. This enables the network element to be reconfigured in a manner that is transparent to other network elements, and provided high availability for the network element.Type: ApplicationFiled: September 29, 2004Publication date: April 6, 2006Inventors: Manasi Deval, Suhail Ahmed, Santosh Balakrishnan, Hormuzd Khosravi, Sanjay Bakshi
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Publication number: 20050171165Abstract: A process for preparing a novel intermediate in the preparation of perindopril is provided.Type: ApplicationFiled: November 10, 2004Publication date: August 4, 2005Inventors: Shekhar Bhirud, Suhail Ahmed, Batchu Chandrasekhar, Vandanapu Loka Purushotham
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Publication number: 20050108416Abstract: A method of distributing processing in a network device includes defining controller and worker control plane protocol modules. The method also includes developing corresponding entries in a communications library and implementing an infrastructure module, the communication library and the controller module on a control plane. The infrastructure module, the communication library and the worker modules are implemented on a forwarding plane.Type: ApplicationFiled: November 13, 2003Publication date: May 19, 2005Applicant: Intel CorporationInventors: Hormuzd Khosravi, Sanjay Bakshi, Rajeev Muralidhar, Suhail Ahmed, Manasi Deval
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Publication number: 20040136371Abstract: A router uses a distributed implementation of a routing control protocol to route a packet between a plurality of computer networks. The router includes a control-plane having a control-plane processor to implement a central control portion of the control protocol and a plurality of forwarding-planes, each having a forwarding-plane processor, to implement an offload control portion of the control protocol. A back-plane connects the forwarding-planes to each other and to the control-plane. Together, these components route a packet based on the distributed implementation of the control protocol. The protocol may be a signaling protocol, such as RSVP-TE, or a routing protocol, such as OSPF.Type: ApplicationFiled: November 13, 2003Publication date: July 15, 2004Inventors: Rajeev D. Muralidhar, Sanjay Bakshi, Rajendra S. Yavatkar, Suhail Ahmed
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Publication number: 20040083385Abstract: Methods and apparatus for loading a security algorithm in a fast path of a network processor are disclosed. In an example method, a network processor generates a statistic associated with a plurality of communication packets received by the network processor, determines a security attack on the network processor is in progress based on the statistic and loads the security algorithm in the fast path of the network processor.Type: ApplicationFiled: October 25, 2002Publication date: April 29, 2004Inventors: Suhail Ahmed, Erik J. Johnson, Manasi Deval