Patents by Inventor Suhas Chakravarty

Suhas Chakravarty has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lock detection circuit for phase locked loop
    Patent number: 8076979
    Abstract: A lock detector circuit for detecting a lock condition between a reference signal and a feedback signal includes a first counter for outputting a first counter value indicative of a number of clock cycles of the reference signal, and a second counter for outputting a second counter value indicative of a number of clock cycles of the feedback signal. An asynchronous comparator receives the first and second counter values and provides an output signal having a pulse width that is proportional to the difference between the first and second counter values. A pulse width detector receives the comparator output signal and produces an output signal that is indicative of the relationship between the pulse width of the comparator output signal and a predetermined threshold value. A state machine controls the state of at least one lock indication signal according to the pulse width detector output signal.
    Type: Grant
    Filed: April 2, 2009
    Date of Patent: December 13, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Manan Kathuria, Kumar Abhishek, Suhas Chakravarty, Suri Roopak
  • LOCK DETECTION CIRCUIT FOR PHASE LOCKED LOOP
    Publication number: 20090251226
    Abstract: A lock detector circuit for detecting a lock condition between a reference signal and a feedback signal includes a first counter for outputting a first counter value indicative of a number of clock cycles of the reference signal, and a second counter for outputting a second counter value indicative of a number of clock cycles of the feedback signal. An asynchronous comparator receives the first and second counter values and provides an output signal having a pulse width that is proportional to the difference between the first and second counter values. A pulse width detector receives the comparator output signal and produces an output signal that is indicative of the relationship between the pulse width of the comparator output signal and a predetermined threshold value. A state machine controls the state of at least one lock indication signal according to the pulse width detector output signal.
    Type: Application
    Filed: April 2, 2009
    Publication date: October 8, 2009
    Applicant: FREESCALE SEMICONDUCTOR, INC
    Inventors: Manan Kathuria, Kumar Abhishek, Suhas Chakravarty, Suri Roopak