Abstract: A system and apparatus for use in energy conversion. In one embodiment, the apparatus comprises at least one power converter for producing power at a first level while receiving an indicium of proper operation and, upon not receiving the indicium of proper operation, producing power at a second level, where the second level is less than the first level.

Abstract: A system and apparatus for use in energy conversion. In one embodiment, the apparatus comprises a gateway remotely located from an inverter and having (i) a first terminal for coupling to AC wiring upon which the inverter couples AC power, wherein the AC power is generated by the inverter from DC power, and wherein the gateway obtains data pertaining to operation of the inverter via the first terminal, and (ii) a second terminal for coupling information related to the data to an external monitor, remotely located with respect to the gateway, via a communications network.

Abstract: A system and apparatus for use in energy conversion. In one embodiment, the apparatus comprises at least one power converter for producing power at a first level while receiving an indicium of proper operation and, upon not receiving the indicium of proper operation, producing power at a second level, where the second level is less than the first level.

Abstract: A system and apparatus for use in energy conversion. In one embodiment, the apparatus comprises a gateway remotely located from an inverter and having (i) a first terminal for coupling to AC wiring upon which the inverter couples AC power, wherein the AC power is generated by the inverter from DC power, and wherein the gateway obtains data pertaining to operation of the inverter via the first terminal, and (ii) a second terminal for coupling information related to the data to an external monitor, remotely located with respect to the gateway, via a communications network.

Abstract: A method and a system are disclosed that enable an address at the edge router to be used to establish a multi-pipe virtual private network (MVPN) connecting controllers to multiple web enabled end user devices (EUDs) inside a security protected local area network (LAN). The EUDs connect to a central server (CS) outside the LAN during configuration establishing registration and identity (ID) for each EUD. Once the EUDs establish connection from inside the LAN, the CS is enabled to communicate with the EUDs using the address and ID provided during registration. The CS then acts as a facilitator establishing secure VPN connection between controllers in the cloud and the EUDs inside the LAN. CS further acts as a pass through for those LANs that do not allow direct connections to controllers outside the LAN. The CS continues to monitor the health of the overall system once connectivity is established.

Abstract: A system and apparatus for generating power. In one embodiment, the apparatus comprises a power module for coupling to a DC power source via a DC bus, wherein the power module (i) converts a first power from the DC power source to a second power, and (ii) comprises a maximum power point tracking module unit for dynamically adjusting a load voltage of the DC power source; an AC bus; and a controller, physically separate from the power module and coupled to the power module via the AC bus, for operatively controlling the power module.

Abstract: A method and a system are disclosed that enable an address at the edge router to be used to establish a multi-pipe virtual private network (MVPN) connecting controllers to multiple web enabled end user devices (EUDs) inside a security protected local area network (LAN). The EUDs connect to a central server (CS) outside the LAN during configuration establishing registration and identity (ID) for each EUD. Once the EUDs establish connection from inside the LAN, the CS is enabled to communicate with the EUDs using the address and ID provided during registration. The CS then acts as a facilitator establishing secure VPN connection between controllers in the cloud and the EUDs inside the LAN. CS further acts as a pass through for those LANs that do not allow direct connections to controllers outside the LAN. The CS continues to monitor the health of the overall system once connectivity is established.

Abstract: A method and a system are disclosed that enable an address at the edge router to be used to establish a multi-pipe virtual private network (MVPN) connecting controllers to multiple web enabled end user devices (EUDs) inside a security protected local area network (LAN). The EUDs connect to a central server (CS) outside the LAN during configuration establishing registration and identity (ID) for each EUD. Once the EUDs establish connection from inside the LAN, the CS is enabled to communicate with the EUDs using the address and ID provided during registration. The CS then acts as a facilitator establishing secure VPN connection between controllers in the cloud and the EUDs inside the LAN. CS further acts as a pass through for those LANs that do not allow direct connections to controllers outside the LAN. The CS continues to monitor the health of the overall system once connectivity is established.

Abstract: A system and apparatus for generating power. In one embodiment, the apparatus comprises a power module for coupling to a DC power source via a DC bus, wherein the power module (i) converts a first power from the DC power source to a second power, and (ii) comprises a maximum power point tracking module unit for dynamically adjusting a load voltage of the DC power source; an AC bus; and a controller, physically separate from the power module and coupled to the power module via the AC bus, for operatively controlling the power module.

Abstract: A method and a system are disclosed that enable an address at the edge router to be used to establish a multi-pipe virtual private network (MVPN) connecting controllers to multiple web enabled end user devices (EUDs) inside a security protected local area network (LAN). The EUDs connect to a central server (CS) outside the LAN during configuration establishing registration and identity (ID) for each EUD. Once the EUDs establish connection from inside the LAN, the CS is enabled to communicate with the EUDs using the address and ID provided during registration. The CS then acts as a facilitator establishing secure VPN connection between controllers in the cloud and the EUDs inside the LAN. CS further acts as a pass through for those LANs that do not allow direct connections to controllers outside the LAN. The CS continues to monitor the health of the overall system once connectivity is established.

Abstract: A system and method for converting DC from one or more sources to AC power utilizing a novel partitioning scheme are disclosed. This partitioning scheme is particularly well suited for photovoltaic (PV) microinverter applications. The primary goals are to make installation, operation and maintenance of the system safe and simple. Secondary goals are to improve reliability and lifetime of the converter in a cost effective manner. In one embodiment, the microinverters are placed in one-to-one proximity with the photovoltaic modules, each proximate microinverter incorporating a reduced number of functions and components. Remaining common functions and controls are implemented separately.

Abstract: The system provides for vertical or horizontal centering, or both, without the use of a memory frame buffer, of raster image data whose start time and duration cannot be controlled. The centering is accomplished by controlling the frame start time and line start time of the overall display of the raster imaging surface. This is accomplished in the case of vertical centering by detecting the time of the beginning of the first or last line, or both, of the total lines of the raster image data to be displayed an controlling the start time of a subsequent one of the frames based on that detected time. Horizontal centering is carried out by detecting the time of the beginning of the first or last column, or both, of the columns in one or more of the lines of the raster image data and controlling the start time of subsequent ones of the lines based on that detected time.

Abstract: The system provides for vertical or horizontal centering, or both, without the use of a memory frame buffer, of raster image data whose start time and duration cannot be controlled. The centering is accomplished by controlling the frame start time and line start time of the overall display of the raster imaging surface. This is accomplished in the case of vertical centering by detecting the time of the beginning of the first or last line, or both, of the total lines of the raster image data to be displayed and controlling the start time of a subsequent one of the frames based on that detected time. Horizontal centering is carried out by detecting the time of the beginning of the first or last column, or both, of the columns in one or more of the lines of the raster image data and controlling the start time of subsequent ones of the lines based on that detected time.

Abstract: Disclosed is a set of functional components (tiles), consisting in part of subgate elements, which, by their design, facilitate the creation of dense integrated circuits, without forfeiting the capability of modifying the functionality of individual tiles by late mask programming techniques. Overall densities approaching those obtained with hand-crafted, custom designs can be obtained in part because such components are designed to be tiled throughout a storage logic array, permitting the creation of orthogonal logic gates as well as individual gates (and more complex functions) the functionality of which is distributed horizontally, vertically and even in a zigzag fashion. Moreover, the transition time from prototype to high volume manufacturing is reduced significantly due to the ease with which even complex functions can be repaired and enhanced.

Abstract: Disclosed is a set of functional components (tiles), consisting in part of subgate elements, which, by their design, facilitate the creation of dense integrated circuits, without forfeiting the capability of modifying the functionality of individual tiles by late mask programming techniques. Overall densities approach those obtained with hand-crafted, custom designs can be obtained in part because such components are designed to be tiled throughout a storage logic array, permitting the creation of orthogonal logic gates as well as individual gates (and more complex functions) the functionality of which is distributed horizontally, vertically and even in a zigzag fashion. Moreover, the transition time from prototype to high volume manufacturing is reduced significantly due to the ease with which even complex functions can be repaired and enhanced.

Abstract: A storage/logic array (SLA). In a programmable form (PSLA), the array includes a set of parallel, programmably segmentable column conductors and an orthogonal set of programmably segmentable row conductors. Each of a plurality of cell networks is associated with and coupled to a subset of the row conductors and a subset of the column conductors. At least one column conductor subset has an associated cell network which includes a storage element which is coupled to the associated column subset and row subset for that cell network. In a nonprogrammable form, the SLA is similar to the programmable form (PSLA) except that row and column conductors are segmented at predetermined locations, and cell networks are coupled to predetermined, associated subsets of the row and column conductors.

Abstract: An asynchronous logic array capable of directly implementing Petri net specification of digital systems is disclosed. The array can be used in general synthesis of asynchronous digital circuits and systems. The parallel nature of the array gives the realized systems the speed and other characteristics of hard wired circuits even though they are realized from a uniform logic array. The logic array is particularly suited for implementing control circuits and promises to extend the field of microprogramming to asynchronous and parallel computers.

Abstract: An asynchronous logic array capable of directly implementing Petri net specification of digital systems is disclosed. The array can be used in general synthesis of asynchronous digital circuits and systems. The parallel nature of the array gives the realized systems the speed and other characteristics of hard wired circuits even though they are realized from a uniform logic array. The logic array is particularly suited for implementing control circuits and promises to extend the field of micro programming to asynchronous and parallel computers.