Patents by Inventor Suk-Joong Kang

Suk-Joong Kang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11978846
    Abstract: A solid electrolyte membrane for a solid-state battery and a battery comprising the same is provided. The battery may comprise lithium metal as a negative electrode active material. The solid electrolyte membrane comprises an inhibiting layer, which is preferably capable of inhibiting growth of lithium dendrite, because it includes an effective amount of a dendrite growth-inhibiting material, which is capable of ionizing lithium deposited in the form of metal. Thus, when lithium metal is used as a negative electrode for a solid-state battery comprising the solid electrolyte membrane, it is possible to delay and/or inhibit growth of lithium dendrite, and thus to effectively prevent an electrical short-circuit caused by dendrite growth.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: May 7, 2024
    Assignee: LG ENERGY SOLUTION, LTD.
    Inventors: Jung-Pil Lee, Sung-Joong Kang, Eun-Bee Kim, Ji-Hoon Ryu, Suk-Woo Lee, Jae-Hyun Lee
  • Patent number: 7714695
    Abstract: The present invention relates to a method for manufacturing a SrTiO3 series varistor using grain boundary segregation, and more particularly, to a method for manufacturing a SrTiO3 series varistor by sintering a powdered composition in which acceptors such as Al and Fe are added in powdered form and then sintered under a reducing atmosphere and heat-treated them in the air to selectively form electrical conduction barriers at grain boundaries in a process for manufacturing SrTiO3 series varistor having an excellent non-linear coefficient and a breakdown voltage suitable for use.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: May 11, 2010
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Suk-Joong Kang, Seong-Min Wang, Sung-Yoon Chung
  • Publication number: 20070273468
    Abstract: The present invention relates to a method for manufacturing a SrTiO3 series varistor using grain boundary segregation, and more particularly, to a method for manufacturing a SrTiO3 series varistor by sintering a powdered composition in which acceptors such as Al and Fe are added in powdered form and then sintered under a reducing atmosphere and heat-treated them in the air to selectively form electrical conduction barriers at grain boundaries in a process for manufacturing SrTiO3 series varistor having an excellent non-linear coefficient and a breakdown voltage suitable for use.
    Type: Application
    Filed: February 22, 2007
    Publication date: November 29, 2007
    Inventors: Suk-Joong Kang, Seong-Min Wang, Sung-Yoon Chung
  • Patent number: 6548011
    Abstract: A method of manufacturing an alumina-based ceramic includes sintering a powder compact of an iron-containing alumina powder in an atmosphere (N2, 95 N2-5 H2, H2) of a relatively low oxygen partial pressure, and annealing in an atmosphere (80 N2-20 O2, O2) higher in oxygen partial pressure than the sintering atmosphere to provide an alumina-based ceramic with a grain-boundary migration layer on a surface thereof. The resulting undulated grain boundaries on the surface layer suppress and deflect the crack propagation, thereby improving the short-crack toughness. The formation of a grain-boundary migration layer on the surface of an alumina-based ceramic brings about a great improvement in short-crack related properties, including durability and wear resistance.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: April 15, 2003
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Young Woo Rhee, Ho Yong Lee, Suk Joong Kang
  • Patent number: 6447605
    Abstract: Disclosed is a method for preparing heteroepitaxial thin films which are free of island structures which have a bad influence on the photoelectric properties and interfacial reactivity of the thin films. These heteroepitaxial thin films are deposited on grooved or curved surfaces of substrates. The use of grooved substrates relieves the coherent elastic strain from the thin films, thereby inhibiting the surface roughening and the island structure formation in the heteroepitaxial thin films. The method can be applied to all of the thin films that show island structures, including GaAs/Si and SiGe/Si typically used in semiconductor devices and various electronic parts, enabling the thin films to be flatly deposited at a significant thickness on various substrates without additionally processing.
    Type: Grant
    Filed: November 17, 1999
    Date of Patent: September 10, 2002
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Sung Yoon Chung, Suk Pil Kim, Byung Sung Kang, Si Kyung Choi, Suk Joong Kang
  • Patent number: 6358464
    Abstract: A method for making a BaTiO3-based dielectric having a high dielectric constant and a low dielectric loss wherein, a BaTiO3-based body is subjected to a pre-heat treatment in a hydrogen (H2) atmosphere or a reducing atmosphere containing mixed gas of hydrogen and nitrogen in a ratio of hydrogen:nitrogen=5 to 100%:0 to 95% prior to a sintering process in the manufacture of dielectrics, in order to obtain a reduced average grain size of BaTiO3. By virtue of the reducing average grain size of BaTiO3, a BaTiO3-based dielectric having a high dielectric constant and a low dielectric loss is obtained.
    Type: Grant
    Filed: October 23, 2000
    Date of Patent: March 19, 2002
    Assignee: Korea Advanced Institute of Science and Technology
    Inventors: Byung Kee Lee, Yang Il Jung, Ho Yong Lee, Suk-Joong Kang, Sung Yoon Chung