Patents by Inventor Sukehisa Noda
Sukehisa Noda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 6002166Abstract: The present invention relates a semiconductor device, and in particular, it aims at providing a semiconductor device having high reliability by making coating of a region where a gold wire has been used, which has been performed for preventing deformation and breakage of the gold wire in pressure fitting of resin, unnecessary and preventing deformation and breakage of the gold wire without increasing the fabrication cost, in a semiconductor device packaging a power device and a control device controlling this power device. In order to attain the aforementioned object, a mold gate (21) is provided on a molding die (20) employed in fabrication of the semiconductor device to be positioned on a side where a power device (PD) is arranged in a state placing a lead frame (10).Type: GrantFiled: July 28, 1998Date of Patent: December 14, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Sukehisa Noda, Shinji Yamada, Tooru Iwagami, Seiki Iwagaki, Hisashi Kawafuji
-
Patent number: 5998856Abstract: The present invention relates to a semiconductor device, and more particularly, it aims at providing a semiconductor device which is excellent in workability of assembly and reduces the assembly cost in a semiconductor device packaging a power device and a control device controlling this power device.In order to attain the aforementioned object, it shows a lead frame (10) before mounting a power device (PD) and a control device (CD), and a region where a gold wire (W2) is arranged and a region where the power device (PD) is arranged are silver-plated regions (A). Further, a region where an aluminum wire (W1) is arranged is a nickel-plated region (B). Further, a power device die pad (1A) is connected to a tie bar (5) and a frame (6) by suspension leads (40 to 45), and supported in three directions. Further, an intermediate lead (3A to 3D) is formed in the vicinity of the control device (CD).Type: GrantFiled: July 28, 1998Date of Patent: December 7, 1999Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Sukehisa Noda, Shinji Yamada, Tooru Iwagami, Seiki Iwagaki, Hisashi Kawafuji
-
Patent number: 5834842Abstract: A groove (21) is formed on an upper surface of sealing resin (2) in the form of a strip. A device (101) is pressed against a flat surface of a radiating fin (55) by a band plate shaped clamper (61) which is engaged with the groove (21). Due to the engagement of the clamper (61) and the groove (21), movement of the device (101) is limited. Namely, the device (101) is stably fixed to the radiating fin (55). Since the device (101) is fixed to the radiating fin (55) by the clamper (61), no hole for receiving a fastening screw is provided in the sealing resin (2). Therefore, the sealing resin (2) is reduced, whereby miniaturization of the device (101) is implemented. Thus, the device is miniaturized at no sacrifice of radiation efficiency.Type: GrantFiled: October 27, 1997Date of Patent: November 10, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
-
Patent number: 5773883Abstract: In a device (101) formed as an invertor, terminals connected to floating source pins (VS) which are provided in control circuits (31 to 33) are limited to output terminals (U, V, W). In order to hold voltages across floating source pins (VD, VS), capacitive elements (51 to 53) which are provided around the device (101) are connected to the output terminals (U, V, W). Thus, the terminals which are connected with the floating source pins (VS) are shared by the output terminals (U, V, W), whereby the numbers of the terminals and wiring patterns are reduced. Thus, the device (101) is miniaturized.Type: GrantFiled: June 13, 1996Date of Patent: June 30, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
-
Patent number: 5767573Abstract: A semiconductor device is disclosed which employs transfer molding to simplify a resin sealing step, reduces fabrication costs without using expensive elements, and has an improved efficiency of dissipation of heat generated by a power device and an improved product rating. The power device (101) and a control device (102) are placed in predetermined positions on horizontally positioned lead frames (103a, 103b), respectively. An insulating layer (105) of epoxy resin or the like is formed on a major surface of a heat sink (104), and a circuit pattern layer (106) formed on a major surface of the insulating layer (105) is shaped to conform to a predetermined circuit pattern. The lead frames (103a, 103b) are disposed on the circuit pattern layer (106).Type: GrantFiled: April 17, 1996Date of Patent: June 16, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Sukehisa Noda, Akira Fujita, Naoki Yoshimatsu, Makoto Takehara
-
Patent number: 5747876Abstract: It is an object to facilitate assembly of an application device. A device (101) is provided with a heat sink (51) to radiate loss heat of an IGBT element (11) as a power semiconductor element to an external radiation fin. External terminals (5 and 6) connected to an external circuit substrate protrude in the direction in which the exposed surface of the heat sink (51) is directed. Accordingly, when assembling an application device by mounting the device (101) on the external circuit substrate together with other circuit elements, it is possible to mount the device (101) and other circuit elements together on the common main surface of the circuit substrate, i.e., on its main surface on the side opposite to the side where the radiation fin is attached. Accordingly, it is possible to collectively apply solder on the common main surface of the circuit substrate and collectively solder the device (101) and the other circuit elements.Type: GrantFiled: July 16, 1996Date of Patent: May 5, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
-
Patent number: 5703399Abstract: A blanked lead frame serves both as an interconnection pattern for a control circuit and a power circuit and as external terminals. Highly heat conducting resin having an electric insulating property is put between the lead frame and the heat sink arranged to face each other to maintain good thermal conductivity therebetween. The heat sink and the lead frame are coupled easily and fixedly by performing a simple process of sealing with the highly heat conducting resin. Accordingly, no expensive circuit boards are required, which have been necessary in conventional devices, nor a process of patterning the interconnection pattern and a process of connecting the external terminals to the interconnection pattern when manufacturing the device required. That is to say, the manufacturing cost is reduced without deteriorating the heat radiating characteristic.Type: GrantFiled: May 15, 1996Date of Patent: December 30, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gourab Majumdar, Tooru Iwagami, Sukehisa Noda
-
Patent number: 5672910Abstract: It is an object to downsize a device while maintaining a high breakdown voltage. An external terminal (7) protrudes to the outside from the side wall of a sealing resin (2) and a heat sink (1) is exposed in the bottom of the sealing resin (2). A step surface (21) retracted from the exposed surface of the heat sink (1) is formed in the part of the sealing resin (2) surrounding the periphery of the heat sink (1). When using this semiconductor device, the exposed surface of the heat sink (1) is brought into surface contact with the flat surface (41a) of the radiation fin (41) and an insulation sheet (31) is interposed between the step surface (21) and the flat surface (41a), and which is pressed therebetween. The insulation sheet (31) is disposed to cover the region facing the external terminal (7) in the flat surface (41a).Type: GrantFiled: June 13, 1996Date of Patent: September 30, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gourab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
-
Patent number: 5652840Abstract: A communication control apparatus comprising a transmission source/destination address storing unit which stores transmission source addresses specifying a plurality of signal input terminals, and transmission destination addresses paired in advance with signal input terminals in advance; a transmission signal generating unit which adds transmission source addresses and transmission destination addresses corresponding to signal input terminals to which signals have been input; a reception source/destination address storing unit which stores reception source addresses, specifying a plurality of signal output terminals, and reception destination addresses, specifying the transmission source of signals; and a reception signal decoding unit which outputs a signal to one or a plurality of output terminals having the reception source/destination address, stored in the reception source/destination address storing unit, matching the transmission source/destination address transmitted.Type: GrantFiled: January 12, 1995Date of Patent: July 29, 1997Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Yasushi Okamoto, Sukehisa Noda
-
Patent number: D394244Type: GrantFiled: May 24, 1996Date of Patent: May 12, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gorab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji
-
Patent number: D401912Type: GrantFiled: May 28, 1996Date of Patent: December 1, 1998Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Gorab Majumdar, Satoshi Mori, Sukehisa Noda, Tooru Iwagami, Yoshio Takagi, Hisashi Kawafuji