Patents by Inventor Sum-Yee Betty Tang

Sum-Yee Betty Tang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140091417
    Abstract: A method of depositing a low refractive index coating on a photo-active feature on a substrate comprises forming a substrate having one or more photo-active features thereon and placing the substrate in a process zone. A deposition gas is energized in a remote gas energizer, the deposition gas comprising a fluorocarbon gas and an additive gas. The remotely energized deposition gas is flowed into the process zone to deposit a low refractive index coating on the substrate.
    Type: Application
    Filed: September 28, 2013
    Publication date: April 3, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Sum-Yee Betty TANG, Martin SEAMONS, Kiran V. THADANI, Abhijit MALLICK
  • Publication number: 20140091379
    Abstract: A fluorocarbon coating comprises an amorphous structure with CF2 bonds present in an atomic percentage of at least about 15%, and having a refractive index of less than about 1.4. The fluorocarbon coating can be deposited on a substrate by placing the substrate in a process zone comprising a pair of process electrodes, introducing a deposition gas comprising a fluorocarbon gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes.
    Type: Application
    Filed: September 28, 2013
    Publication date: April 3, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Sum-Yee Betty TANG, Martin SEAMONS
  • Patent number: 8125034
    Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: February 28, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
  • Publication number: 20110151142
    Abstract: Embodiments of the present invention provide methods for reducing defects during multi-layer deposition. In one embodiment, the method includes exposing the substrate to a first gas mixture and an inert gas in the presence of a plasma to deposit a first material layer on the substrate, terminating the first gas mixture when a desired thickness of the first material is achieved while still maintaining the plasma and flowing the inert gas, and exposing the substrate to the inert gas and a second gas mixture that are compatible with the first gas mixture in the presence of the plasma to deposit a second material layer over the first material layer in the same processing chamber, wherein the first material layer and the second material layer are different from each other.
    Type: Application
    Filed: December 15, 2010
    Publication date: June 23, 2011
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Martin Jay Seamons, Sum-Yee Betty Tang, Michael H. Lin, Patrick Reilly, Sudha Rathi
  • Publication number: 20100239979
    Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
    Type: Application
    Filed: June 9, 2010
    Publication date: September 23, 2010
    Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
  • Patent number: 7776516
    Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: August 17, 2010
    Assignee: Applied Materials, Inc.
    Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
  • Patent number: 7407893
    Abstract: Methods are provided for depositing amorphous carbon materials. In one aspect, the invention provides a method for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas into the processing chamber, wherein the processing gas comprises a carrier gas, hydrogen, and one or more precursor compounds, generating a plasma of the processing gas by applying power from a dual-frequency RF source, and depositing an amorphous carbon layer on the substrate.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: August 5, 2008
    Assignee: Applied Materials, Inc.
    Inventors: Martin Jay Seamons, Wendy H. Yeh, Sudha S. R. Rathi, Deenesh Padhi, Andy (Hsin Chiao) Luan, Sum-Yee Betty Tang, Priya Kulkarni, Visweswaren Sivaramakrishnan, Bok Hoen Kim, Hichem M'Saad, Yuxiang May Wang, Michael Chiu Kwan
  • Publication number: 20080020319
    Abstract: A method of forming a device using a graded anti-reflective coating is provided. One or more amorphous carbon layers are formed on a substrate. An anti-reflective coating (ARC) is formed on the one or more amorphous carbon layers wherein the ARC layer has an absorption coefficient that varies across the thickness of the ARC layer. An energy sensitive resist material is formed on the ARC layer. An image of a pattern is introduced into the layer of energy sensitive resist material by exposing the energy sensitive resist material to patterned radiation. The image of the pattern introduced into the layer of energy sensitive resist material is developed.
    Type: Application
    Filed: July 18, 2006
    Publication date: January 24, 2008
    Inventors: Wendy H. Yeh, Martin J. Seamons, Matthew Spuller, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Sudha Rathi
  • Publication number: 20070207275
    Abstract: Methods for cleaning semiconductor processing chambers used to process carbon-containing films, such as amorphous carbon films, barrier films comprising silicon and carbon, and low dielectric constant films including silicon, oxygen, and carbon are provided. The methods include using a remote plasma source to generate reactive species that clean interior surfaces of a processing chamber in the absence of RF power in the chamber. The reactive species are generated from an oxygen-containing gas, such as O2, and/or a halogen-containing gas, such as NF3. An oxygen-based ashing process may also be used to remove carbon deposits from the interior surfaces of the chamber before the chamber is exposed to the reactive species from the remote plasma source.
    Type: Application
    Filed: August 23, 2006
    Publication date: September 6, 2007
    Inventors: Thomas Nowak, Kang Sub Yim, Sum-Yee Betty Tang, Kwangduk Douglas Lee, Vu Ngoc Tran Nguyen, Dennis Singleton, Martin Jay Seamons, Karthik Janakiraman, Ganesh Balasubramanian, Mohamed Ayoub, Wendy H. Yeh, Alexandros T. Demos, Hichem M'Saad
  • Patent number: 6762127
    Abstract: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: July 13, 2004
    Inventors: Yves Pierre Boiteux, Hui Chen, Ivano Gregoratto, Chang-Lin Hsieh, Hoiman Hung, Sum-Yee Betty Tang
  • Publication number: 20030073321
    Abstract: The present invention provides a novel etching technique for etching a layer of C-doped silicon oxide, such as a partially oxidized organo silane material. This technique, employing CH2F2/Ar chemistry at low bias and low to intermediate pressure, provides high etch selectivity to silicon oxide and improved selectivity to organic photoresist. Structures including a layer of partially oxidized organo silane material (1004) deposited on a layer of silicon oxide (1002) were etched according to the novel technique, forming relatively narrow trenches (1010, 1012, 1014, 1016, 1030, 1032, 1034 and 1036) and wider trenches (1020, 1022, 1040 and 1042). The technique is also suitable for forming dual damascene structures (1152, 1154 and 1156). In additional embodiments, manufacturing systems (1410) are provided for fabricating IC structures of the present invention. These systems include a controller (1400) that is adapted for interacting with a plurality of fabricating stations (1420, 1422, 1424, 1426 and 1428).
    Type: Application
    Filed: August 23, 2001
    Publication date: April 17, 2003
    Applicant: Applied Material, Inc.
    Inventors: Yves Pierre Boiteux, Hui Chen, Ivano Gregoratto, Chang-Lin Hsieh, Hoiman Hung, Sum-Yee Betty Tang
  • Patent number: 6380096
    Abstract: An integrated in situ oxide etch process particularly useful for a counterbore dual-damascene structure over copper having in one inter-layer dielectric level a lower nitride stop layer, a lower oxide dielectric, a lower nitride stop layer, an upper oxide dielectric layer, and an anti-reflective coating (ARC). The process is divided into a counterbore etch and a trench etch with photolithography for each, and each step is preferably performed in a high-density plasma reactor having an inductively coupled plasma source primarily generating the plasma and a capacitively coupled pedestal supporting the wafer and producing the bias power. The counterbore etch preferably includes at least four substeps of opening the ARC, etching through the upper oxide and nitride layers, selectively etching the lower oxide layer but stopping on the lower nitride layer, and a post-etch treatment for removing residue.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: April 30, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Hoiman Hung, Joseph P Caulfield, Sum-Yee Betty Tang, Jian Ding, Tianzong Xu
  • Publication number: 20010008226
    Abstract: An integrated in situ oxide etch process particularly useful for a counterbore dual-damascene structure over copper having in one inter-layer dielectric level a lower nitride stop layer, a lower oxide dielectric, a lower nitride stop layer, an upper oxide dielectric layer, and an anti-reflective coating (ARC). The process is divided into a counterbore etch and a trench etch with photolithography for each, and each step is preferably performed in a high-density plasma reactor having an inductively coupled plasma source primarily generating the plasma and a capacitively coupled pedestal supporting the wafer and producing the bias power. The counterbore etch preferably includes at least four substeps of opening the ARC, etching through the upper oxide and nitride layers, selectively etching the lower oxide layer but stopping on the lower nitride layer, and a post-etch treatment for removing residue.
    Type: Application
    Filed: November 30, 1998
    Publication date: July 19, 2001
    Inventors: HOIMAN HUNG, JOSEPH P. CAULFIELD, SUM-YEE BETTY TANG, JIAN DING, TIANZONG XU