Patents by Inventor Sumio Terakawa
Sumio Terakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9210304Abstract: Techniques described herein generally relate to digital imaging systems, methods and devices. In some example embodiments, a low light adaptive photoelectric imaging device may include a photoelectric transducer configured to receive and convert incident light into an electric charge that varies in response to an intensity of the received incident light. Some example imaging devices may also include circuitry coupled to the photoelectric transducer and configured to electrically float a potential at one or more terminals of the photoelectric transducer effective to cause the photoelectric transducer to amplify the electric charge according to a gain function that non-linearly varies relative to the intensity of the received incident light.Type: GrantFiled: March 16, 2012Date of Patent: December 8, 2015Assignee: Empire Technology Development LLCInventors: Takahiro Yamada, Sumio Terakawa
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Publication number: 20140055648Abstract: Techniques described herein generally relate to digital imaging systems, methods and devices. In some example embodiments, a low light adaptive photoelectric imaging device may include a photoelectric transducer configured to receive and convert incident light into an electric charge that varies in response to an intensity of the received incident light. Some example imaging devices may also include circuitry coupled to the photoelectric transducer and configured to electrically float a potential at one or more terminals of the photoelectric transducer effective to cause the photoelectric transducer to amplify the electric charge according to a gain function that non-linearly varies relative to the intensity of the received incident light.Type: ApplicationFiled: March 16, 2012Publication date: February 27, 2014Applicant: EMPIRE TECHNOLOGY DEVELOPMENT LLCInventors: Takahiro Yamada, Sumio Terakawa
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Patent number: 8368096Abstract: There are provided image pickup devices capable of significantly increasing production yield and ensuring long-term reliability and a method for manufacturing the image pickup devices.Type: GrantFiled: December 27, 2005Date of Patent: February 5, 2013Assignee: AAC Technologies Japan R&D Center Co., Ltd.Inventors: Osamu Asano, Hitoo Iwasa, Sumio Terakawa, Masami Shouji
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Patent number: 8284299Abstract: A solid state imaging device detects the period of energy variation of discharge type illumination, and sets a total exposure time to match the detected period. The total exposure time is divided into alternating valid and invalid exposure times by a division ratio to make the sum of the valid exposure times equal to an actual exposure time corresponding to an actual speed of an electronic shutter. Charges accumulated in a CMOS sensor during the valid exposure times are stored in a floating diffusion, whereas charges accumulated during the invalid exposure times are drained. At the end of the total exposure time, the charges stored during the valid exposure times are converted to an electrical signal which is output to a signal processing circuit. This device can correct variation of output signals which corresponds to the illumination energy variation when the shutter is operated for imaging under high luminance illumination.Type: GrantFiled: June 23, 2006Date of Patent: October 9, 2012Assignee: Funai Electric Co., Ltd.Inventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
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Publication number: 20100133596Abstract: A solid-state imaging device includes pixels arranged in a matrix on a semiconductor substrate, the pixels each including: a photodiode for photoelectric-converting an incident light beam; a readout transistor for reading out a signal charge from the photodiode; and a floating diffusion region for converting the read out signal charge into a voltage, wherein the semiconductor substrate is of an n-type, a first p-type well is provided below an n-type forming layer of the photodiode so as to be located at a distant position from a surface of the n-type substrate at the photodiode side, and partially or entirely below the readout transistor, the first p-type well is formed so as to reach the surface of the semiconductor substrate.Type: ApplicationFiled: April 16, 2008Publication date: June 3, 2010Applicant: ROSNES CORPORATIONInventor: Sumio Terakawa
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Patent number: 7679159Abstract: Each of three light receiving sections has a P-type well having a P+-type layer and an N-type layer formed therein. The P+-type layer is diffused from substrate surface to depth d1. A PN junction forming portion of the N-type layer is diffused from depth d1 to depth d2 which is greater than depth d1 so as to form, with the P-type well, a PN junction of a photodiode at depth d2. Depths d1 as well as depths d2 of the three light receiving sections are different from each other. The N-type layer has a charge output portion which is diffused from the PN junction to the substrate surface, and which is coupled by circuit coupling to a MOS transistor for reading out charge. This allows each light receiving section to have spectral characteristics, thereby providing a solid state imaging element and a solid state imaging device without using color filters.Type: GrantFiled: June 1, 2006Date of Patent: March 16, 2010Assignee: Funal Electric Co., Ltd.Inventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
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Patent number: 7639298Abstract: Adjacent pixels in a pixel circuit of an imaging device use a primary capacitance, an amplifying transistor, a reset switch and a selection switch in common. Each pixel has a photodiode and a transfer switch having first and second gates provided on the photodiode side and the primary capacitance side, respectively. In a pixel downsampling read mode, the first and second gate voltages of each pixel to be discarded are brought to high level, and thereafter the first and second gate voltages of each pixel to be read are brought to high level, to transfer charge generated in the photodiode of the pixel to be read to the primary capacitance and the photodiode in each pixel to be discarded. This enables reduction of the potential of the primary capacitance, and hence reduction of the pixel sensitivity than using only the primary capacitance to store charge transferred from the transfer switch.Type: GrantFiled: December 13, 2006Date of Patent: December 29, 2009Assignee: Funai Electric Co., Ltd.Inventors: Masaya Oita, Hiromichi Tanaka, Masafumi Kimata, Sumio Terakawa
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Publication number: 20080042227Abstract: There are provided image pickup devices capable of significantly increasing production yield and ensuring long-term reliability and a method for manufacturing the image pickup devices.Type: ApplicationFiled: December 27, 2005Publication date: February 21, 2008Applicant: I SQUARE RESERCH CO., LTD.Inventors: Osamu Asano, Hitoo Iwasa, Sumio Terakawa, Masami Shouji
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Publication number: 20070131993Abstract: Adjacent pixels in a pixel circuit of an imaging device use a primary capacitance, an amplifying transistor, a reset switch and a selection switch in common. Each pixel has a photodiode and a transfer switch having first and second gates provided on the photodiode side and the primary capacitance side, respectively. In a pixel downsampling read mode, the first and second gate voltages of each pixel to be discarded are brought to high level, and thereafter the first and second gate voltages of each pixel to be read are brought to high level, to transfer charge generated in the photodiode of the pixel to be read to the primary capacitance and the photodiode in each pixel to be discarded. This enables reduction of the potential of the primary capacitance, and hence reduction of the pixel sensitivity than using only the primary capacitance to store charge transferred from the transfer switch.Type: ApplicationFiled: December 13, 2006Publication date: June 14, 2007Applicants: Funai Electric Co., Ltd., Ritsumeikan UniversityInventors: Masaya Oita, Hiromichi Tanaka, Masafumi Kimata, Sumio Terakawa
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Publication number: 20060290797Abstract: A solid state imaging device detects the period of energy variation of discharge type illumination, and sets a total exposure time to match the detected period. The total exposure time is divided into alternating valid and invalid exposure times by a division ratio to make the sum of the valid exposure times equal to an actual exposure time corresponding to an actual speed of an electronic shutter. Charges accumulated in a CMOS sensor during the valid exposure times are stored in a floating diffusion, whereas charges accumulated during the invalid exposure times are drained. At the end of the total exposure time, the charges stored during the valid exposure times are converted to an electrical signal which is output to a signal processing circuit. This device can correct variation of output signals which corresponds to the illumination energy variation when the shutter is operated for imaging under high luminance illumination.Type: ApplicationFiled: June 23, 2006Publication date: December 28, 2006Applicants: Funai Electric Co., Ltd., Ritsumeikan UniversityInventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
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Publication number: 20060273361Abstract: Each of three light receiving sections has a P-type well having a P+-type layer and an N-type layer formed therein. The P+-type layer is diffused from substrate surface to depth d1. A PN junction forming portion of the N-type layer is diffused from depth d1 to depth d2 which is greater than depth d1 so as to form, with the P-type well, a PN junction of a photodiode at depth d2. Depths d1 as well as depths d2 of the three light receiving sections are different from each other. The N-type layer has a charge output portion which is diffused from the PN junction to the substrate surface, and which is coupled by circuit coupling to a MOS transistor for reading out charge. This allows each light receiving section to have spectral characteristics, thereby providing a solid state imaging element and a solid state imaging device without using color filters.Type: ApplicationFiled: June 1, 2006Publication date: December 7, 2006Applicants: Funai Electric Co., Ltd., Ritsumeikan UniversityInventors: Hiromichi Tanaka, Hideto Yoshimura, Sumio Terakawa, Masafumi Kimata
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Patent number: 6606198Abstract: In a lens array, a multiplicity of condenser lenses, each in a convex lens form, are arrayed in vertical and horizontal directions so as to correspond to pixel regions, respectively, and each condenser lens, when viewed from a direction perpendicular to a condenser lens-arrayed plane, takes a planar shape formed with a four straight sides along four sides of the pixel region and four circular arcs extending between the respective straight sides. A center of the four circular arcs substantially coincides with a center of the corresponding pixel region. This ensures an increase in area covered with the condenser lens in the pixel region, thereby causing more light rays to enter the condenser lens. In addition, a radius of curvature necessary for collecting can be obtained more easily. Consequently, light rays can be efficiently collected and guided to light receiving sections or the like provided in the pixel regions.Type: GrantFiled: March 26, 2001Date of Patent: August 12, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Tomohiko Sasano, Yasuhiro Tanaka, Michihiro Yamagata, Yoshikazu Sano, Tomoko Komatsu, Michiyo Ichikawa, Sumio Terakawa, Hiromitu Aoki
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Publication number: 20010036014Abstract: In a lens array, a multiplicity of condenser lenses, each in a convex lens form, are arrayed in vertical and horizontal directions so as to correspond to pixel regions, respectively, and each condenser lens, when viewed from a direction perpendicular to a condenser lens-arrayed plane, takes a planar shape formed with a four straight sides along four sides of the pixel region and four circular arcs extending between the respective straight sides. A center of the four circular arcs substantially coincides with a center of the corresponding pixel region. This ensures an increase in area covered with the condenser lens in the pixel region, thereby causing more light rays to enter the condenser lens. In addition, a radius of curvature necessary for collecting can be obtained more easily. Consequently, light rays can be efficiently collected and guided to light receiving sections or the like provided in the pixel regions.Type: ApplicationFiled: March 26, 2001Publication date: November 1, 2001Inventors: Tomohiko Sasano, Yasuhiro Tanaka, Michihiro Yamagata, Yoshikazu Sano, Tomoko Komatsu, Michiyo Ichikawa, Sumio Terakawa, Hiromitu Aoki
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Patent number: 5952714Abstract: A lead frame 24 comprising an inner lead 22 and outer lead 23 is sealingly filled from a through-hole into a package 21. A CCD chip 27 is inserted from an inlet 26 into the package 21. An electrode pad 28 is connected to the inner lead 22 via a bump 29 to complete an optical positioning and an electrical connection, then the positions of these components are fixed by glue. As a result, a solid-state image sensing apparatus can be manufactured at a low cost, and an accurate positioning can be realized. Thus, the solid-state image sensing apparatus can be employed to a video camera of high quality picture to reproduce vivid colors and fine pictures.Type: GrantFiled: June 16, 1997Date of Patent: September 14, 1999Assignee: Matsushita Electronics CorporationInventors: Yoshikazu Sano, Sumio Terakawa, Eiichi Tsujii, Masaji Asaumi, Yoshikazu Chatani
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Patent number: 5324669Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer ( 6 ) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9 ) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate ( 5). The thick, low-density p-layer ( 33 ) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.Type: GrantFiled: August 12, 1993Date of Patent: June 28, 1994Assignee: Matsushita Electronics CorporationInventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
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Patent number: 5262661Abstract: The impurity density of a photoelectric transducer n-layer (7) and the impurity density of a p-layer (6) of an impurity region in which the electric transducer (7) and a transfer channel (9) are formed, are each distributed to have its maximum value in a more interior part from the surface of a semiconductor substrate (5). Alternatively, i) a thin, high-density p-layer (34) and ii) a thick, low-density p-layer (33) of an impurity region in which the electric transducer (7) and the transfer channel (9) are formed may be formed. Each minimum potential in these two p-layers (33, 34) is made to have a different dependence on the voltage applied to an n-type semiconductor substrate (5). The thick, low-density p-layer (33) is formed in such a way that it comes into contact with part of the photoelectric transducer n-layer (7) at its bottom portion.Type: GrantFiled: June 6, 1991Date of Patent: November 16, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takao Kuroda, Sumio Terakawa, Shigeru Okamoto, Katsuya Ishikawa
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Patent number: 5223726Abstract: In a CCD device, a plurality of trench holes are formed in high resistivity semiconductor layer and juxtaposed in a charge transfer direction, and charge transfer electrodes are buried in the trench holes. Charge transfer regions are formed in the semiconductor layer around the vicinity of the respective trench holes during a main operating state.Type: GrantFiled: January 10, 1992Date of Patent: June 29, 1993Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takahiro Yamada, Sumio Terakawa
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Patent number: 5083173Abstract: Signal charge conveying regions are made as oblong depletion regions which are formed in operation state along and at the vicinity of side walls of a trench or groove in a seimconductor imaging device, thereby improving resolution power, dynamic range, sensitivity and S/N characteristics are improved.Type: GrantFiled: December 14, 1990Date of Patent: January 21, 1992Assignees: Matsushita Electronics Corporation, Matsushita Electric Industrial Co., Ltd.Inventors: Takahiro Yamada, Sumio Terakawa
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Patent number: 4450484Abstract: A solid-state image sensor in which a light signal charge transfer means comprising a metal oxide semiconductor (MOS) vertical shift register and switching elements is provided so that the light signal charge stored in the photoelectric transducer elements in one column in an (m.times.n) photoelectric transducer matrix array is simultaneously transferred to a vertical transmission line; and another charge transfer means comprising a transfer gate means and storage capacitor elements transfers the light signal charge transferred onto the vertical transmission line to a horizontal shift register from which the light signal charge is transferred to an output stage. The horizontal shift register comprises a charge-coupled device (CCD) type horizontal shift register. The solid-state image sensor can eliminate blooming caused by the incidence of light with a high intensity and smear caused by the incidence of light on the areas except predetermined light reception areas.Type: GrantFiled: May 20, 1981Date of Patent: May 22, 1984Assignee: Matsushita Electronics CorporationInventors: Sumio Terakawa, Kenju Horii
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Patent number: 4366503Abstract: A solid-state image pick-up device has transfer gates and storage capacitive elements with smaller capacitance than that of a vertical transfer lines between the vertical transfer lines to which signal charge is transferred through the operation of a signal charge transfer circuit containing the vertical shift register and switch elements, and a horizontal shift register for receiving the signal charge. The horizontal shift register is of the charge coupling type. The horizontal shift register has unit elements two times the vertical transfer lines. An optical signal and the other charge than the optical signal charge are stored in the adjacent unit elements and then the other charge than the optical charge is outputted to the other portion than a signal output portion.Type: GrantFiled: October 15, 1980Date of Patent: December 28, 1982Assignees: Matsushita Electronics Corp., Matsushita Electric Industrial Co., Ltd.Inventors: Sumio Terakawa, Tohru Takamura, Kenju Horii, Takahiro Yamada