Patents by Inventor Sun-Teck See

Sun-Teck See has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050251609
    Abstract: A peripheral device coupleable to an ExpressCard™ interface of a host system includes an ExpressCard™ portion and a second portion coupleable to the ExpressCard™ portion. Functionality of the peripheral device is partitioned between the ExpressCard™ portion and the second portion.
    Type: Application
    Filed: May 4, 2004
    Publication date: November 10, 2005
    Inventors: Horng-Yee Chou, Sun-Teck See
  • Publication number: 20050223158
    Abstract: A multi media card (MMC) is disclosed. The MMC includes a flash controller and at least one flash memory device. The flash controller increases the throughput of the at least one flash memory device to match the speed of a host bus coupled to the MMC. The flash controller increases the throughput by performing one or more of performing a read-ahead memory read operation, performing a write-ahead memory write operation, increasing the size of a page register of the at least one flash memory device, increasing the width of a memory data bus, performing a dual-channel concurrent memory read operation, performing a dual-channel concurrent memory write operation, performing a write-cache memory write operation, and any combination thereof.
    Type: Application
    Filed: April 5, 2004
    Publication date: October 6, 2005
    Inventors: Sun-Teck See, Tzu-Yih Chu, Horng-Yee Chou, Charles Lee
  • Publication number: 20050160218
    Abstract: A FLASH controller is disclosed. The controller comprises a USB interface unit. The USB interface unit implements a USB standard that has a bus speed equal or greater than 12 Mb/s. The controller includes an internal bus coupled to the USB interface unit; and a FLASH interface unit coupled to the internal bus. The FLASH interface unit includes FLASH controller logic that allows the throughput for access to the FLASH memory to match the speed of the USB standard. Advantages of the FLASH controller in accordance with the present invention include (1) utilizing the higher speed USB interface such as the USB 2.
    Type: Application
    Filed: January 20, 2004
    Publication date: July 21, 2005
    Inventors: Sun-Teck See, Tzu-Yih Chu, Ben-Wei Chen, Horng-yee Chou, Szu-Kuang Chou, Charles Lee
  • Publication number: 20050160223
    Abstract: A flash-card exchanger has two modes of operation. When a host personal computer (PC) is connected to a Universal-Serial-Bus (USB) connector, the flash-card exchanger operates in a card reader mode, allowing the host to read data from removable flash-memory cards inserted into connector slots of the flash-card exchanger. When the host PC is not connected, a USB flash-memory thumb or key-chain drive can be inserted into a second USB connector. A USB dual-mode microcontroller acts as a USB host, reading data from the removable flash-memory card and writing the data to the USB-memory key drive using USB packets. Since the USB-memory key drive is small and removable, the user can upgrade to larger storage capacities by plugging in a larger-capacity USB-memory key drive. A flash-exchanger program executing on the USB dual-mode microcontroller copies data from an input-output bus and generates USB packets to the USB-memory key drive.
    Type: Application
    Filed: January 15, 2004
    Publication date: July 21, 2005
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Ben Wei Chen, Tzu-Yih Chu, Sun-Teck See
  • Publication number: 20050146491
    Abstract: A multi-light-emitting diode (LED) display for a USB flash drive produces a visually dazzling display. When accessed, a USB flash controller drives pulses onto an activity signal that increments a counter on a pattern-decoding generator. The pattern-decoding generator decodes the count and drives signals to data outputs. The data outputs connect to LED's, turning LED's on and off according to a display pattern. The pattern can be programmed by the USB flash controller into the pattern-decoding generator, or can be a hardwired pattern. Marquee patterns having a lit LED appearing to move down a line of LED's have more visual appeal than single LED indicators. Each data line can drive two LED's in different parts of a dual display, reducing costs. Multi-color LED's can be used to improve variety. The multiple LED's and the pattern-decoding generator can be mounted on a flexible PCB.
    Type: Application
    Filed: December 24, 2003
    Publication date: July 7, 2005
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Ching-Jong Su, Sun-Teck See, Tzu-Yih Chu
  • Publication number: 20050138288
    Abstract: A flash memory device for connecting to an ExpressCard™ host includes at least one flash memory module, an ExpressCard™ connector for connecting to the ExpressCard™ host, a first serial interface coupled to the ExpressCard™ connector, and a controller coupled to the first serial interface and the at least one flash memory module.
    Type: Application
    Filed: December 23, 2003
    Publication date: June 23, 2005
    Inventors: Horng-Yee Chou, Ben Wei Chen, Sun-Teck See
  • Publication number: 20050120157
    Abstract: A dual-mode Universal-Serial-Bus (USB) switch can operate in a normal hub mode to buffer transactions from a host to multiple USB flash storage blocks that are USB endpoints. When operating in a single-endpoint mode, the dual-mode USB switch intercepts packets from the host and responds to the host as a single USB endpoint. The USB switch aggregates all downstream USB flash storage blocks and reports a single pool of memory to the host as a single virtual USB memory. Adjacent transactions can be overlapped by packet re-ordering. A token packet that starts a following transaction is re-ordered to be sent to the USB flash storage blocks before the data and handshake packets that end a first transaction, allowing the second transaction to begin accessing the flash memory earlier. Data can be mirrored or striped across several USB flash storage blocks and parity can be added for error recovery.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Ben Wei Chen, Horng-Yee Chou, Sun-Teck See
  • Publication number: 20050120146
    Abstract: A Universal-Serial-Bus (USB) single-chip flash device contains a USB flash microcontroller and flash mass storage blocks containing flash memory arrays that are block-addressable rather than randomly-addressable. USB packets from a host USB bus are read by a serial engine on the USB flash microcontroller. Various routines that execute on a CPU in the USB flash microcontroller are activated in response to commands in the USB packets. A flash-memory controller in the USB flash microcontroller transfers data from the serial engine to the flash mass storage blocks for storage. Rather than boot from an internal ROM coupled to the CPU, a boot loader is transferred by DMA from the first page of the flash mass storage block to an internal RAM. The flash memory is automatically read from the first page at power-on. The CPU then executes the boot loader from the internal RAM to load the control program.
    Type: Application
    Filed: December 2, 2003
    Publication date: June 2, 2005
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Ben Wei Chen, Horng-Yee Chou, Sun-Teck See, Charles Lee
  • Publication number: 20050114587
    Abstract: An ExpressCard contains flash memory. The ExpressCard has an ExpressCard connector that plugs into a host, such as a personal computer, digital camera, or personal digital assistant (PDA). A controller chip on the ExpressCard uses a pair of differential Universal-Serial-Bus (USB) data lines in the connector to communicate with the USB host, or can use PCI Express, Firewire, or other protocols. One or more flash-memory chips on the ExpressCard are controlled by a flash-memory controller in the controller chip. Two or more channels of a flash bus have a shared control bus but separate ready lines. The separate ready lines allow flash-memory chips in the two channels to finish operations at different times.
    Type: Application
    Filed: November 22, 2003
    Publication date: May 26, 2005
    Applicant: SUPER TALENT ELECTRONICS INC.
    Inventors: Horng-Yee Chou, Sun-Teck See, Tzu-Yih Chu
  • Patent number: 6874044
    Abstract: A flash-drive or flash-card reader connects to a personal computer (PC) through a serial link such as a Universal-Serial-Bus (USB), IEEE 1394, SATA, or IDE. A local CPU acts as the bus master of a CPU bus that connects to slave ports on a flash-memory controller, a serial engine, and a RAM buffer. A second bus in parallel to the CPU bus connects a second slave port on the RAM buffer to a master port on the flash-memory controller and to a master port on the serial engine. The flash-memory controller or the serial engine can use their master ports to transfer data to and from the RAM buffer using the second bus, allowing the CPU to retain control of the CPU bus. The second bus is a flash-serial buffer bus that improves data transfer rates. The flash-memory controller can prefetch into the RAM buffer.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: March 29, 2005
    Assignee: SuperTalent Electronics, Inc.
    Inventors: Horng-Yee Chou, Sun-Teck See, Tzu-Yih Chu
  • Publication number: 20050055481
    Abstract: A flash-drive or flash-card reader connects to a personal computer (PC) through a serial link such as a Universal-Serial-Bus (USB), IEEE 1394, SATA, or IDE. A local CPU acts as the bus master of a CPU bus that connects to slave ports on a flash-memory controller, a serial engine, and a RAM buffer. A second bus in parallel to the CPU bus connects a second slave port on the RAM buffer to a master port on the flash-memory controller and to a master port on the serial engine. The flash-memory controller or the serial engine can use their master ports to transfer data to and from the RAM buffer using the second bus, allowing the CPU to retain control of the CPU bus. The second bus is a flash-serial buffer bus that improves data transfer rates. The flash-memory controller can prefetch into the RAM buffer.
    Type: Application
    Filed: September 10, 2003
    Publication date: March 10, 2005
    Applicant: SUPER TALENT FLASH, INC
    Inventors: Horng-Yee Chou, Sun-Teck See, Tzu-Yih Chu