Abstract: A switchable amplifier and comparator circuit includes an operational amplifier having an inverting input, a non-inverting input, a first differential output and a second differential output, the first differential output switchably coupled to the inverting input and the second differential output switchably coupled to the non-inverting input. A first feedback capacitor is coupled to the inverting input and switchably coupled to the first differential output, a second feedback capacitor is coupled to the non-inverting input and switchably coupled to the second differential output. A capacitive load is switchably coupled between the first differential output and the second differential output. A diode clamp circuit is switchably coupled between the first differential output and the second differential output. A resistive load is switchably coupled between the first differential output and the second differential output.

Abstract: One example includes an R2R digital-to-analog converter (DAC) circuit. The circuit includes at least one scaling circuit configured to apply a scale-factor with respect to a nominal voltage range defined by a low-voltage rail and a reference voltage to define a scaled voltage range. The scale-factor can be positive and less than one. The circuit also includes an R2R ladder circuit configured to generate an analog ladder voltage corresponding to a digital input signal. The analog ladder voltage can have an amplitude in the scaled voltage range. The circuit further includes an output stage configured to apply an inverse of the scale-factor to the analog ladder voltage to generate an output voltage.

Abstract: One example includes an R2R digital-to-analog converter (DAC) circuit. The circuit includes at least one scaling circuit configured to apply a scale-factor with respect to a nominal voltage range defined by a low-voltage rail and a reference voltage to define a scaled voltage range. The scale-factor can be positive and less than one. The circuit also includes an R2R ladder circuit configured to generate an analog ladder voltage corresponding to a digital input signal. The analog ladder voltage can have an amplitude in the scaled voltage range. The circuit further includes an output stage configured to apply an inverse of the scale-factor to the analog ladder voltage to generate an output voltage.

Abstract: A delay locked loop (DLL) is calibrated to obtain a measure of offset error in the DLL. The offset error is compensated for in normal operation. In an embodiment, a current corresponding to the measure of offset is forced into one of a pair of paths carrying error signals representing a phase-mismatch between a reference signal and a feedback signal. In another embodiment, additional delay corresponding to the measure of offset is introduced on one of the pair of paths. Offset error is thus largely removed in normal operation of the DLL. The DLL employs an amplifier in place of a charge pump to remove systematic offset errors due to a charge pump. A phase detector in the DLL is designed such that an overlap interval of error outputs of the phase detector is at least half the period of the reference signal, thereby lending to high-frequency operation.

Abstract: A delay locked loop (DLL) is calibrated to obtain a measure of offset error in the DLL. The offset error is compensated for in normal operation. In an embodiment, a current corresponding to the measure of offset is forced into one of a pair of paths carrying error signals representing a phase-mismatch between a reference signal and a feedback signal. In another embodiment, additional delay corresponding to the measure of offset is introduced on one of the pair of paths. Offset error is thus largely removed in normal operation of the DLL. The DLL employs an amplifier in place of a charge pump to remove systematic offset errors due to a charge pump. A phase detector in the DLL is designed such that an overlap interval of error outputs of the phase detector is at least half the period of the reference signal, thereby lending to high-frequency operation.