Abstract: A method and apparatus for protecting an input-out (I/O) circuit against electro-static discharge (ESD) events. An ESD circuit used to protect the I/O circuit against an ESD event is coupled to the I/O circuit. The ESD circuit includes a diode clamp circuit that couples an I/O pad to a power supply and a ground pad. The ESD circuit further includes an active clamp circuit that is configured to clamp the I/O pad without turning on the diode clamp circuit during the ESD event.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: Effectively defect free images are obtained from CMOS image sensors through a two step method in which the addresses of bad pixels are recorded during sensor testing and stored in an on-chip directory. Then, during sensor readout, each pixel address is checked to determine if it represents that of a bad pixel. If this is determined to be the case, the bad pixel value is replaced by another value. This replacement value is generated from an average of the nearest-neighbors that are not defective. If testing is performed at the wafer level, said bad pixel and nearest neighbor data may be used to modify the final level wiring so that bad pixels are disconnected and replaced by their nearest neighbors.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: The present invention relates to a fingerprint sensing device comprising a planar array of closely-spaced capacitive sense elements. When a finger is placed in close proximity to the sensing device, the capacitive sense elements measure a capacitance between the finger and a single capacitor plate in each sense element. This is accomplished by precharging each capacitor plate, and then using a known current source to remove a fixed amount of charge from each capacitor plate. The measured capacitance varies as a function of the distance between the capacitor plate and the finger surface. Thus, a capacitance measurement allows the distance between the capacitor plate and the finger surface to be determined. Distance measurements across the array of sense elements are combined to produce a representation of the pattern of ridges on the finger surface which comprise a fingerprint.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.

Abstract: The present invention relates to a fingerprint sensing device comprising a planar array of closely-spaced capacitive sense elements. When a finger is placed in close proximity to the sensing device, the capacitive sense elements measure a capacitance between the finger and a single capacitor plate in each sense element. This is accomplished by precharging each capacitor plate, and then using a known current source to remove a fixed amount of charge from each capacitor plate. The measured capacitance varies as a function of the distance between the capacitor plate and the finger surface. Thus, a capacitance measurement allows the distance between the capacitor plate and the finger surface to be determined. Distance measurements across the array of sense elements are combined to produce a representation of the pattern of ridges on the finger surface which comprise a fingerprint.

Abstract: An apparatus for detecting topographic variations on an object such as a finger includes an array of sensing elements disposed on a substrate which each have a parasitic capacitance. An insulating receiving surface is disposed over the array of sensing elements and is adapted to receive the object such that a sensing element and a portion of the object located thereabove creates a measurable change in capacitance with respect to the parasitic capacitance. An electronic circuit is coupled to the array of sensing elements for measuring the measurable change in capacitance.

Abstract: An imaging device formed as a monolithic complementary metal oxide semiconductor integrated circuit in an industry standard complementary metal oxide semiconductor process, the integrated circuit including a focal plane array of pixel cells, each one of the cells including a photogate overlying the substrate for accumulating photo-generated charge in an underlying portion of the substrate, a readout circuit including at least an output field effect transistor formed in the substrate, and a charge coupled device section formed on the substrate adjacent the photogate having a sensing node connected to the output transistor and at least one charge coupled device stage for transferring charge from the underlying portion of the substrate to the sensing node.