Abstract: A system and methods of forming a dielectric material within a trench are described herein. In an embodiment of the method, the method includes introducing a first precursor into a trench of a dielectric layer, such that portions of the first precursor react with the dielectric layer and attach on sidewalls of the trench. The method further includes partially etching portions of the first precursor on the sidewalls of the trench to expose upper portions of the sidewalls of the trench. The method further includes introducing a second precursor into the trench, such that portions of the second precursor react with the remaining portions of the first precursor to form the dielectric material at the bottom of the trench.

Abstract: A method for predicting clinical severity of a neurological disorder includes steps of: a) identifying, according to a magnetic resonance imaging (MRI) image of a brain, brain image regions each of which contains a respective portion of diffusion index values of a diffusion index, which results from image processing performed on the MRI image; b) for one of the brain image regions, calculating a characteristic parameter based on the respective portion of the diffusion index values; and c) calculating a severity score that represents the clinical severity of the neurological disorder of the brain based on the characteristic parameter of the one of the brain image regions via a prediction model associated with the neurological disorder.

Abstract: An anti-peep light source module includes a light source module and a viewing angle switching module. The light source module has a light source and a light guide plate (LGP) and has light emitting elements arranged along a first direction. The viewing angle switching module is located on a transmission path of an illumination beam of the light source module and includes a viewing angle limiting element and a viewing angle adjusting element configured to change a viewing angle of the illumination beam. The viewing angle limiting element has a grating structure and is located between the viewing angle adjusting element and the light source module. an included angle between an extension direction of the grating structure and the first direction is within a range from 88 degrees to 92 degrees. The anti-peep light source module and A display device achieve favorable optical performance, user experience, and production yield.

Abstract: A display panel has an odd-shaped active area and a peripheral area. The display panel includes a substrate, pixel units, gate lines and at least one dummy thin film transistor. The pixel units are disposed on the active area of the substrate. The gate lines are disposed on the substrate, each of the gate lines is coupled to one or more of the pixel units, and the number of pixel units coupled to a first gate line of the gate lines is smaller than the number of pixel units a second gate line coupled to of the gate lines. The dummy thin film transistor is disposed on the substrate, and is coupled to the first gate line.

Abstract: A gate driving circuit is provided, which includes shift registers and a reset signal line. The shift registers respectively provide scan signals to gate lines of a display panel. Each shift register includes a precharge unit and pull-up unit. The precharge unit is coupled to a first node and outputs a precharge signal through the first node. The pull-up unit is coupled to the first node and the second node and outputs one of the scan signals to a corresponding one of the gate lines through the second node. The reset signal line is coupled to the shift registers and provides a reset signal to the shift registers. The reset signal is used to reset the shift registers after the shift registers respectively output the scan signals. The reset signal line is arranged between a layout area of the precharge unit and a layout area of the pull-up unit.

Abstract: A reflective LCD panel includes a color filter substrate, an array substrate, a liquid crystal layer and a polarizing film. The array substrate and the color filter substrate are disposed oppositely. The liquid crystal layer is disposed between the color filter substrate and the array substrate and has an alignment direction. The polarizing film is disposed on the color filter substrate, and color coordinates of the polarizing film in the CIE1976 color space are (a, b), wherein 0.05?a?0.2 and ?5?b?0. The liquid crystal layer has a birefringence difference ?n, the liquid crystal layer has a thickness (d), when the reflective LCD panel is in a white frame, 2?n*d=?? is satisfied, ?? is the optical path difference obtained when a forward light vertically enters the liquid crystal layer and is reflected by the array substrate, and 120 nm??n*d?170 nm.

Abstract: A reflective LCD panel includes a color filter substrate, an array substrate, a liquid crystal layer and a polarizing film. The array substrate and the color filter substrate are disposed oppositely. The liquid crystal layer is disposed between the color filter substrate and the array substrate and has an alignment direction. The polarizing film is disposed on the color filter substrate, and color coordinates of the polarizing film in the CIE1976 color space are (a, b), wherein 0.05?a?0.2 and ?5?b?0. The liquid crystal layer has a birefringence difference ?n, the liquid crystal layer has a thickness (d), when the reflective LCD panel is in a white frame, 2?n*d=?? is satisfied, ?? is the optical path difference obtained when a forward light vertically enters the liquid crystal layer and is reflected by the array substrate, and 120 nm??n*d?170 nm.

Abstract: The present invention provides a display panel including a non-rectangular display area. The display panel includes a first pixel row. The first pixel row includes a plurality of inner pixels and a plurality of end pixels. The inner pixels are disposed in the non-rectangular display area, and the end pixels are disposed between an end of the first pixel row and the inner pixels. An area of a display region of each of the end pixels is less than an area of a display region of each of the inner pixels. In the first pixel row, areas of a plurality of display regions of the end pixels are increased along a direction from the end of the first pixel row toward the inner pixels.

Abstract: A display panel including a first substrate, a second substrate opposite to the first substrate, and a display medium located between the first substrate and the second substrate is provided. The display panel further includes a plurality of pixel structures, a plurality of data lines and a plurality of scan lines electrically connected to the pixel structures, a first driving unit located at a peripheral area, at least one test line, and at least one first pad located at the peripheral area. Each of the data lines has a first end and a second end opposite to each other. The first driving unit is electrically connected to the first ends of the data lines. The at least one test line is electrically connected to the second ends of at least part of the data lines. The at least one test line is grounded through the at least one first pad.

Abstract: A gate driving circuit and a display panel with the gate driving circuit are provided. The gate driving circuit includes shift registers. The shift registers are configured to respectively provide scan signals to gate lines of a display panel. One of the shift registers includes a pre-charge unit, a pull-up unit and a reset unit. The pre-charge unit is coupled to a first node and is configured to output a pre-charge signal to the first node. The pull-up unit is coupled to the first node and a second node and is configured to output one of the scan signals to the second node. The reset unit is coupled to the first node and the second node and is configured to receive a reset signal. A voltage level of the reset signal switches after the gate driving circuit scans the gate lines sequentially in a frame period.

Abstract: A thin film transistor substrate having a display region and a peripheral region, and the thin film transistor substrate includes a first substrate, scan lines, data lines, an insulating layer, first thin film transistors, at least one passivation layer and at least one gate driving circuit. The first substrate has an electrostatic protection area and a driving circuit area, and the electrostatic protection area and the driving circuit area are situated in the peripheral region. The scan lines, the data lines and the first thin film transistors are disposed in the display region. The insulating layer includes a gate insulator of the first thin film transistor, and the passivation layer is disposed on the insulating layer. The gate driving circuit is disposed in the driving circuit area. At least one of the passivation layer and the insulating layer are not disposed in the electrostatic protection area.

Abstract: The present invention provides a display panel including a non-rectangular display area. The display panel includes a first pixel row. The first pixel row includes a plurality of inner pixels and a plurality of end pixels. The inner pixels are disposed in the non-rectangular display area, and the end pixels are disposed between an end of the first pixel row and the inner pixels. An area of a display region of each of the end pixels is less than an area of a display region of each of the inner pixels. In the first pixel row, areas of a plurality of display regions of the end pixels are increased along a direction from the end of the first pixel row toward the inner pixels.

Abstract: A test method of an in-cell touch display device includes providing a plurality of first test signals and a plurality of second test signals to the first connection pads and the second connection pads of the in-cell touch display device, respectively. Each of the first connection pads is electrically connected to a corresponding data line of the in-cell touch display device, and each of the second connection pads is electrically connected to a corresponding touch electrode of the in-cell touch display device, and the in-cell touch display device is tested after the first and second test signals are provided to the first and second connection pads.

Abstract: A display panel has an odd-shaped active area and a peripheral area. The display panel includes a substrate, pixel units, gate lines and at least one dummy thin film transistor. The pixel units are disposed on the active area of the substrate. The gate lines are disposed on the substrate, each of the gate lines is coupled to one or more of the pixel units, and the number of pixel units coupled to a first gate line of the gate lines is smaller than the number of pixel units a second gate line coupled to of the gate lines. The dummy thin film transistor is disposed on the substrate, and is coupled to the first gate line.

Abstract: A liquid crystal display device includes a plurality of pixel units, an electrode line surrounding the pixel units, at least one gate driver coupled with the pixel units via a plurality of gate lines, and at least one electrostatic discharge protection circuit coupled with the at least one gate driver and the electrode line.

Abstract: The present invention provides a driving circuit and a display device. The driving circuit is disposed on a substrate of the display device. The driving circuit includes thin film transistors (TFTs), a capacitor and clock signal lines. Each of the TFTs includes a gate, a source and a drain. The capacitor is coupled to at least one of the TFTs, and includes a first and a second electrode. The material of the first and the second electrode includes a transparent conductive material. The clock signal lines extend along a first direction. The source and the drain of at least two of the TFTs respectively extend along a second direction. The angle between the first direction and the second direction is between 80 degrees and 100 degrees. At least a partial structure of the capacitor is located in a gap between adjacent ones of the TFTs.

Abstract: A gate driving circuit is provided, which includes shift registers and a reset signal line. The shift registers respectively provide scan signals to gate lines of a display panel. Each shift register includes a precharge unit and pull-up unit. The precharge unit is coupled to a first node and outputs a precharge signal through the first node. The pull-up unit is coupled to the first node and the second node and outputs one of the scan signals to a corresponding one of the gate lines through the second node. The reset signal line is coupled to the shift registers and provides a reset signal to the shift registers. The reset signal is used to reset the shift registers after the shift registers respectively output the scan signals. The reset signal line is arranged between a layout area of the precharge unit and a layout area of the pull-up unit.

Abstract: The invention provides a gate driving circuit and a display apparatus. The gate driving circuit includes 1st to Nth stage shift registers for respectively generating and sequentially outputting 1st to Nth stage scan signals to the display panel, where N is an integer greater than or equal to 4. Each of the shift registers is configured to receive a starting signal, and the starting signal is utilized to trigger the 1st and 2nd stage shift registers to generate the 1st and 2nd stage scan signals respectively, and the starting signal is utilized to reset the 3rd to Nth stage shift registers.

Abstract: A display panel including a first substrate, a second substrate opposite to the first substrate, and a display medium located between the first substrate and the second substrate is provided. The display panel further includes a plurality of pixel structures, a plurality of data lines and a plurality of scan lines electrically connected to the pixel structures, a first driving unit located at a peripheral area, at least one test line, and at least one first pad located at the peripheral area. Each of the data lines has a first end and a second end opposite to each other. The first driving unit is electrically connected to the first ends of the data lines. The at least one test line is electrically connected to the second ends of at least part of the data lines. The at least one test line is grounded through the at least one first pad.

Abstract: The present invention relates to a display panel and a gate driving circuit of the display panel. The gate driving circuit is disposed on a first substrate and includes a first transistor unit. The first transistor unit is disposed on the first substrate and includes a first gate block, a second gate block, and a first connection portion. The first connection portion is electrically connected to the first gate block and the second gate block. At least a gap is formed between the first gate block and the second gate block. The display panel includes the first substrate, the gate driving circuit, a second substrate, and a sealant. The second substrate is disposed corresponding to the first substrate. The sealant is formed between the first substrate and the second substrate.