Abstract: An embodiment of the present invention relates to a cylindrical secondary battery in which a positive electrode terminal is adhered and fixed to a cylindrical can by an insulating sheet, and thus sealing between the cylindrical can and the positive electrode terminal can be facilitated due to an increased contact area.

Abstract: Disclosed is a self-assembled complex containing a calcium ion that includes a calcium ion; and at least one ligand, where the calcium ion and the ligand participate in a reversibly self-assembly or self-disassembly. The shape of the self-assembled complex varies depending on the type of the ligand, or the mixing ratio of the ligand when there are a plurality of ligands.

Abstract: Disclosed is a self-assembled complex containing copper ions, including: copper ions; and one or more ligands, in which the ligands and the copper ions are reversibly self-assembled or self-degraded, and when there are a plurality of types of ligands or a plurality of ligands, the shape of the self-assembled complex is formed differently depending on the blending ratio of the ligands.

Abstract: Disclosed is a self-assembled complex containing an iron ion that includes an iron ion; and at least one ligand, where the iron ion and the ligand are reversibly self-assembled or self-disassembled. The iron ion and the ligand are self-assembled to form an assembly structure at least part of which is round shaped.

Abstract: Discloses is a technology of collecting a biological sample, delivering a substance into a living body, and regulating macrophage adhesion and polarization, by controlling a self-assembled complex and a nanosystem including the same by irradiation with light.

Abstract: The present invention relates to a nanosatellite-substrate complex capable of regulating stem cell adhesion and differentiation, and a method for preparing the same. Moreover, the present invention relates to a method of regulating stem cell adhesion and differentiation by applying a magnetic field to the nanosatellite-substrate complex.

Abstract: A method of manufacturing a solar cell is disclosed. The method comprises the steps of: (a) positioning a plurality of silicon particles comprising a first layer on the outside on the dummy substrate including a plurality of holes corresponding to the holes; (b) forming an optically transparent layer on the dummy substrate to include at least one of the silicon particles; (c) removing the dummy substrate and exposing a portion of the first layer; (d) forming a plurality of first electrodes, wherein the first electrode is connected to the exposed first layer of each of the silicon particles; (e) forming an insulating layer on the first electrode; (f) removing a part of the first layer of silicon particle; (g) forming a second electrode electrically connected to the portion where the first layer of the silicon particle is removed.

Abstract: A solar cell using a printed circuit board (PCB) includes a substrate that is formed of an insulating material and in and through which a plurality of fixing holes and communication holes are alternately formed; a plurality of photoelectric effect generators that have ball or polyhedral shapes fixed to the substrate to be disposed over the plurality of fixing holes, and generate photoelectric effects by receiving light through light-receiving portions that are exposed to an upper portion of the substrate; a plurality of upper electrodes that are formed on a top surface of the substrate, and are connected to the respective light-receiving portions of the photoelectric effect generators; and a plurality of lower electrodes that are formed on a bottom surface of the substrate to be connected to respective non-light-receiving portions of the photoelectric effect generators, and communicate with the plurality of upper electrodes through the plurality of communication holes.

Abstract: A solar cell using a printed circuit board (PCB) includes a substrate that is formed of an insulating material and in and through which a plurality of fixing holes and communication holes are alternately formed; a plurality of photoelectric effect generators that have ball or polyhedral shapes fixed to the substrate to be disposed over the plurality of fixing holes, and generate photoelectric effects by receiving light through light-receiving portions that are exposed to an upper portion of the substrate; a plurality of upper electrodes that are formed on a top surface of the substrate, and are connected to the respective light-receiving portions of the photoelectric effect generators; and a plurality of lower electrodes that are formed on a bottom surface of the substrate to be connected to respective non-light-receiving portions of the photoelectric effect generators, and communicate with the plurality of upper electrodes through the plurality of communication holes.

Abstract: Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

Abstract: Disclosed is a printed circuit board including an insulation member on which a first region and a second region are defined, a circuit pattern formed on the first region, and a support member formed on the second region.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.

Abstract: A method for fabricating a multi-layer printed circuit board can include forming an etching resist layer on a first metal layer having plating grooves that selectively expose the first metal layer, forming a plated layer at the surface of the first metal layer exposed by the plating groove through a plating process to form connection protrusion, removing the etching resist layer, forming an insulation layer at the first metal layer and positioning a second metal layer at the surface of the insulation layer coupled to an end portion of the connection protrusion. By forming the connection protrusion through the plating process, a loss of material can be reduced and a strength of the connection protrusion can be increased. Further, a complexity of the fabrication process is reduced to reduce costs and increase productivity.

Abstract: Bonding pad(s) for a printed circuit board with circuit patterns are provided. The bonding pad(s) include a plurality of copper patterns formed on the PCB and electrically connected to the circuit patterns, a filler filled between the copper patterns such that an upper surface of the copper pattern is exposed, and a plating layer applied at an upper surface of the copper patterns. An interval between wire bonding pad(s) is reduced by preventing a nickel plating layer and a gold plating layer from protruding at a lower portion of a copper pattern when they are formed on the copper patterns.

Abstract: A method for forming bonding pads on a printed circuit board (PCB) with circuit patterns is provided. A plurality of copper patterns are formed on the PCB which are electrically connected to the circuit patterns, and a filler is filled between the copper patterns such that an upper surface of the copper pattern is exposed. A plating layer is then applied to the exposed upper surface of the copper patterns. Protrusion of the plating layer at a lower portion of a copper pattern is prevented, thus reducing an interval between the wire bonding pad(s) and potentially increasing the number of bonding pads which may be effectively formed on a given PCB.

Abstract: A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of t

Abstract: A fabricating method for a multi-layer printed circuit board is provided. The method may include attaching a releasing film at upper and lower surfaces of a center layer and attaching a first metal film to each of the releasing films and a resist layer to each of the first metal films to form a base member. A first connection portion may then be formed on each of the first metal films, and a second connection portion may be integrally formed on each of the first connection portions. A second metal film may then be formed on each of the second connection portions so as to be electrically connected to the connection portions, and, in turn, to the first metal films. Specific portions of the second metal films may be etched to form copper patterns. Upper and lower portions may then be separated by the releasing films to form separate multi-layer printed circuit boards.

Abstract: A printed circuit board (PCB) with a heat dissipation element, a method for manufacturing the PCB, and a semiconductor package using the PCB dissipates heat generated from the semiconductor chip and reduces a printed circuit board height. The PCB includes a heat sink panel, an alloy panel attached to one surface of the heat sink panel serving to ground and to dissipate heat, a circuit pattern layer having via holes formed on one surface of the alloy panel and electrically coupled to the alloy panel, and a cavity formed by perforating the circuit pattern layer and the alloy panel. A semiconductor chip is on the heat sink panel in the cavity and electrically coupled to the circuit pattern layer. The alloy panels with the circuit patterns can be manufactured in pairs with an insulation carrier therebetween. A plurality of dissipation protrusions can be formed on the surface of the alloy panel or the surface of the heat sink panel to couple the same.

Abstract: A method of fabricating a semiconductor package is disclosed in which a first Ni—Au plating is formed on a bonding pad for connection with a semiconductor chip, without a mechanical process or a masking operation. The method applies a copper plating on a through bore and the bonding pad, where the copper plated layer formed on the bonding pad is selectively removed, and then a second Ni—Au plating is formed on the bonding pad and a ball pad.

Abstract: A hole plugging method for a printed circuit board, a hole plugging device in accordance therewith and a manufacturing method in accordance therewith where a mask for selectively exposing a via hole, a through hole and a surface pattern of the printed circuit board is positioned on the board having the via hole and the through hole to electrically connect circuit patterns formed on the surface of the board and in the board and an insulating material is plugged in the via hole by abutting and pushing the material on the surface of the board. Therefore, the insulating material can be plugged smoothly without a void, the processing is simplified by plugging the insulating material just to the height of the circuit pattern in a space between the circuit patterns and accordingly, damage to the circuit pattern can be prevented.