Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.

Abstract: A backside illuminated image sensor includes a light receiving element disposed in a first substrate, an interlayer insulation layer disposed on the first substrate having the light receiving element, an align key spaced apart from the light receiving element and passing through the interlayer insulation layer and the first substrate, a plurality of interconnection layers disposed on the interlayer insulation layer in a multi-layered structure, wherein the backside of the lowermost interconnection layer is connected to the align key, a passivation layer covering the interconnection layers, a pad locally disposed on the backside of the first substrate and connected to the backside of the align key, a light anti-scattering layer disposed on the backside of the substrate having the pad, and a color filter and a microlens disposed on the light anti-scattering layer to face the light receiving element.

Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.

Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are formed corresponding to the array bumps, wherein the array bumps are bonded to the respective outer pads when the cap wafer and the MEMS device wafer are bonded together.

Abstract: A backside illuminated image sensor includes a light receiving element disposed in a first substrate, an interlayer insulation layer disposed on the first substrate having the light receiving element, an align key spaced apart from the light receiving element and passing through the interlayer insulation layer and the first substrate, a plurality of interconnection layers disposed on the interlayer insulation layer in a multi-layered structure, wherein the backside of the lowermost interconnection layer is connected to the align key, a passivation layer covering the interconnection layers, a pad locally disposed on the backside of the first substrate and connected to the backside of the align key, a light anti-scattering layer disposed on the backside of the substrate having the pad, and a color filter and a microlens disposed on the light anti-scattering layer to face the light receiving element.

Abstract: A backside illuminated image sensor includes a light receiving element disposed in a first substrate, an interlayer insulation layer disposed on the first substrate having the light receiving element, an align key spaced apart from the light receiving element and passing through the interlayer insulation layer and the first substrate, a plurality of interconnection layers disposed on the interlayer insulation layer in a multi-layered structure, wherein the backside of the lowermost interconnection layer is connected to the align key, a passivation layer covering the interconnection layers, a pad locally disposed on the backside of the first substrate and connected to the backside of the align key, a light anti-scattering layer disposed on the backside of the substrate having the pad, and a color filter and a microlens disposed on the light anti-scattering layer to face the light receiving element.

Abstract: Disclosed is a backside illuminated image sensor including a light receiving element formed in a first substrate, an interlayer insulation layer formed on the first substrate including the light receiving element, a via hole formed through the interlayer insulation layer and the first substrate while being spaced apart from the light receiving element, a spacer formed on an inner sidewall of the via hole, an alignment key to fill the via hole, interconnection layers formed on the interlayer insulation layer in a multilayer structure in which a backside of a lowermost layer of the interconnection layers is connected to the alignment key, a passivation layer covering the interconnection layers, a pad locally formed on a backside of the first substrate and connected to a backside of the alignment key, and a color filter and a microlens formed on the backside of the first substrate corresponding to the light receiving element.

Abstract: Disclosed is a method of manufacturing a CMOS image sensor, capable of preventing hillock-type defects caused by the delamination of interconnections from occurring in the CMOS image sensor.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array pads arrayed on an outer side of the bonding bumps, and an MEMS device wafer bonded to an upper portion of the cap wafer in a manner to expose the array pads.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array pads arrayed on an outer side of the bonding bumps, and an MEMS device wafer bonded to an upper portion of the cap wafer in a manner to expose the array pads.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array pads arrayed on an outer side of the bonding bumps, and an MEMS device wafer bonded to an upper portion of the cap wafer in a manner to expose the array pads.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are formed corresponding to the array bumps, wherein the array bumps are bonded to the respective outer pads when the cap wafer and the MEMS device wafer are bonded together.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are formed corresponding to the array bumps, wherein the array bumps are bonded to the respective outer pads when the cap wafer and the MEMS device wafer are bonded together.

Abstract: A backside illuminated image sensor includes a light receiving element disposed in a first substrate, an interlayer insulation layer disposed on the first substrate having the light receiving element, an align key spaced apart from the light receiving element and passing through the interlayer insulation layer and the first substrate, a plurality of interconnection layers disposed on the interlayer insulation layer in a multi-layered structure, wherein the backside of the lowermost interconnection layer is connected to the align key, a passivation layer covering the interconnection layers, a pad locally disposed on the backside of the first substrate and connected to the backside of the align key, a light anti-scattering layer disposed on the backside of the substrate having the pad, and a color filter and a microlens disposed on the light anti-scattering layer to face the light receiving element.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array bumps arrayed on an outer side of the bonding bumps, and an MEMS device wafer over which a plurality of first outer pads are formed corresponding to the array bumps, wherein the array bumps are bonded to the respective outer pads when the cap wafer and the MEMS device wafer are bonded together.

Abstract: A package of a micro-electro-mechanical systems (MEMS) device includes a cap wafer, a plurality of bonding bumps formed over the cap wafer, a plurality of array pads arrayed on an outer side of the bonding bumps, and an MEMS device wafer bonded to an upper portion of the cap wafer in a manner to expose the array pads.

Abstract: The present invention relates to a method for forming an inductor in a semiconductor device. The method comprises the steps of forming a first metal layer on a semiconductor substrate in which a predetermined structure is formed, and then patterning the first metal layer so that a predetermined region of the semiconductor substrate is exposed; forming a first copper layer on the entire resulting surface and then polishing the first copper layer; forming a second metal layer on the resulting surface including the polished first copper layer and then patterning the second metal layer so that predetermined regions of the first metal layer and the first copper layer are exposed; forming a second copper layer on the formed resulting surface; and polishing the resulting surface and stripping the first and second metal layers.

Abstract: The present invention discloses a high frequency device including a first wafer providing an inductor having via contact plugs passing through the first wafer and a second wafer bonded to the first wafer, wherein the second wafer provides logic devices and inductor connection lines on an upper side thereof.

Abstract: A method for forming a diffusion barrier layer of a semiconductor device by using an Atomic Layer Deposition (ALD) is disclosed, which, in a method for forming a diffusion barrier layer on an entire surface of a semiconductor substrate before forming a metal pipe connected with the semiconductor substrate through a contact hole, the contact hole being formed to expose one region of the semiconductor substrate by selectively removing an insulating interlayer on the semiconductor substrate, the method includes the steps of forming Ti/TiN layers without being exposed to the air by alternately providing a precursor set by using an atomic layer deposition (ALD) and many kinds of reacting gases, performing a silane treatment on the TiN layer, and forming a Ti thin layer by the ALD.