Patents by Inventor Sung-Ryul Cho

Sung-Ryul Cho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230253190
    Abstract: A deposition apparatus includes a shield member having a lattice shape in a plan view, the lattice shape including short side edges extending along a first direction and long side edges extending along a second direction, the short side edges including first and second short side edges, a bracket member including a first bracket member coupled to the first short side edge, and a second bracket member coupled to the second short side edge, a plurality of anode bars extending along the second direction and stably placed on each of the first bracket member and the second bracket member, and a target member covering the plurality of anode bars. An anode bar of the plurality of anode bars protrudes outward beyond at least one of the first bracket member and the second bracket member, and the anode bar is physically separated from the shield member by the bracket member.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 10, 2023
    Inventors: Kwan Yong LEE, Yong Kuk KIM, Ji Hoon SHIN, Chang Jo LEE, Sung Ryul CHO, Sang Jin HA
  • Patent number: 11637001
    Abstract: A deposition apparatus includes a shield member having a lattice shape in a plan view, the lattice shape including short side edges extending along a first direction and long side edges extending along a second direction, the short side edges including first and second short side edges, a bracket member including a first bracket member coupled to the first short side edge, and a second bracket member coupled to the second short side edge, a plurality of anode bars extending along the second direction and stably placed on each of the first bracket member and the second bracket member, and a target member covering the plurality of anode bars. An anode bar of the plurality of anode bars protrudes outward beyond at least one of the first bracket member and the second bracket member, and the anode bar is physically separated from the shield member by the bracket member.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: April 25, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Kwan Yong Lee, Yong Kuk Kim, Ji Hoon Shin, Chang Jo Lee, Sung Ryul Cho, Sang Jin Ha
  • Publication number: 20210375595
    Abstract: A deposition apparatus includes a shield member having a lattice shape in a plan view, the lattice shape including short side edges extending along a first direction and long side edges extending along a second direction, the short side edges including first and second short side edges, a bracket member including a first bracket member coupled to the first short side edge, and a second bracket member coupled to the second short side edge, a plurality of anode bars extending along the second direction and stably placed on each of the first bracket member and the second bracket member, and a target member covering the plurality of anode bars. An anode bar of the plurality of anode bars protrudes outward beyond at least one of the first bracket member and the second bracket member, and the anode bar is physically separated from the shield member by the bracket member.
    Type: Application
    Filed: January 29, 2021
    Publication date: December 2, 2021
    Inventors: Kwan Yong LEE, Yong Kuk KIM, Ji Hoon SHIN, Chang Jo LEE, Sung Ryul CHO, Sang Jin HA
  • Patent number: 6285795
    Abstract: An apparatus encodes a binary shape signal and decodes the encoded binary shape signal by using a modified binary arithmetic coding and decoding method. In accordance with the modified binary arithmetic coding method, the binary shape signal is first scanned in a predetermined scanning order and a pixel value of its first scanned pixel is provided as one bit data. Then, the apparatus compares each of pixels in the binary shape signal with its precedingly scanned and adjacent pixel by using the scanned binary shape signal and produces a first or a second comparison signal. In response to the first or the second comparison signal, the apparatus assigns one of two mapping values to each of the pixels in the binary shape signal to thereby produce a mapping signal by using the assigned mapping values corresponding to the pixels in the binary shape signal. The mapping signal is arithmetically encoded based on probabilities corresponding to the two mapping values to thereby produce the encoded mapping signal.
    Type: Grant
    Filed: December 21, 1998
    Date of Patent: September 4, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6263115
    Abstract: An apparatus encodes a binary shape signal by using a zig-zag scanning technique. The apparatus zig-zag scans the binary shape signal to thereby output each of the pixels in the binary shape signal sequentially in order of scanning. Then, a context corresponding to each of the pixels is selected from pixels processed prior to said each of the pixels by taking the scanning order into account. By using the context of said each of the pixels, the apparatus ciphers a context number corresponding to said each of the pixels and detects its probability based on the corresponding context number. Through the above procedure, if the probabilities for all of the pixels in the binary shape signal are detected, the apparatus arithmetically encodes the binary shape signal by using the detected probabilities to thereby produce the encoded binary shape signal.
    Type: Grant
    Filed: December 22, 1998
    Date of Patent: July 17, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6256345
    Abstract: A method for encoding a binary alpha block (BAB) type of a target block of an interlaced shape signal is provided. After no_update BAB_type which does not require supplemental encoded data is determined, either frame-basis or field-basis encoding is selected as an encoding_type based on a degree of correlation between the target block and its two field blocks. If field basis encoding is selected as encoding_type, it is determined whether or not said two field blocks correspond to one_field_no_update, which indicates at least one fields of said two field blocks require no supplemental data to be transmitted. If said two field blocks are decided as one_field_no_update, top or_bottom and BAB_type_field are detected to be encoded.
    Type: Grant
    Filed: June 18, 1998
    Date of Patent: July 3, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6240213
    Abstract: In a data compression system for compressing an input stream of characters into a compressed stream of codewords by employing a dictionary, wherein the dictionary stores a plurality of entries of characters, each entry being identified by a unique codeword, the input stream of characters is parsed into parsed strings and the unique codeword identifying each parsed string is transmitted. In the meantime, the dictionary is updated with N new entries of characters, wherein all of the N new entries include an unmatched character which is appended to the parsed string so that a new codeword is assigned to each of the N new entries, N being an integer equal to or larger than 0.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: May 29, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6240214
    Abstract: An apparatus encodes a binary shape signal by using an adaptive context-based arithmetic encoding technique.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: May 29, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6205175
    Abstract: In a method for encoding a contour of an object in a video signal based on a vertex information representing a position and an index of an octant corresponding to each vertex of the contour, a maximum length line segment (MLLS) is first detected among line segments for the contour based on the vertex information (VI). Then, an initial vertex position information (IVPI) and a final vertex position information (FVPI) for the contour are encoded, the initial vertex and the final vertex being two vertices constituting the MLLS. Thereafter, a first bit number (FBN) and a second bit number (SBN) for the contour are set, wherein the FBN is the number of bits required to encode the MLLS and the SBN is the number of bits calculated by using the FBN, typically being FBN-1. In a subsequent step, each of the vertices are classified based on the SBN and the VI either as a first vertex (FV) or as a second vertex (SV) to thereby provide first vertices (FV's) and second vertices (SV's).
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: March 20, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6104323
    Abstract: In a data compression apparatus for compensating a deviation of a compression rate of an input stream of characters (ISC's), a candidate string matching (CSM) circuit, based on codewords (CD's) in a CD dictionary, performs a CSM on the ISC's to provide a first maximum length candidate string (MLCS) and a second MLCS immediately following the first MLCS. A candidate string (CS) storing circuit, based on the CD dictionary, the first MLCS and the second MLCS, generates derived CS pairs (DCSP's) to thereby store a DCSP table listing the DCSP's. A compression rate deviation (CRD) evaluation circuit evaluates a CRD between the first MLCS and the second MLCS, thereby providing the first MLCS and the second MLCS as a first string and a second string, respectively, if a first predetermined CRD evaluation criterion (PCRDEC) is satisfied; and supplying a reduction string matching (RSM) command signal if otherwise.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: August 15, 2000
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6058213
    Abstract: An apparatus, for use in a context-based arithmetic encoding of a binary shape signal, generates a bordered block having a border of width D around a target block based on the binary shape signal which includes a plurality of blocks of P.times.Q pixels having one of a larger and a smaller binary values, P and Q being positive integers, respectively, and the target block is one of the blocks of P.times.Q pixels. In order to produce the bordered block, the apparatus first calculates a weighted mean for each of the border pixels in the bordered block by using N number of neighboring pixels, N being a positive integer. Each of the weighted means is compared with the larger binary value to thereby assign either the larger or the smaller binary value to each of the border pixels. After the binary value to be assigned to each of the border pixels is determined, the apparatus constructs the bordered block based on the binary values assigned to the border pixels and the binary shape signal.
    Type: Grant
    Filed: April 27, 1998
    Date of Patent: May 2, 2000
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 6049633
    Abstract: A method and apparatus, for arithmetically encoding input data, initialize a codeword table with K codewords, K being an integer greater than 1 and a probability value being assigned to each codeword. First to Mth symbols are extracted from the input data and M codewords are generated based thereon, with M being an integer representing a maximum length of codewords to be registered. First L symbols of the extracted M symbols are allocated with a probability of a longest registered codeword, wherein the longest registered codeword is the same as the first L symbols and L is an integer greater than 1. Then, the generated codewords except for the registered codewords are registered at the codeword table and probability values are reassigned to the registered codewords. After registering a predetermined number of codewords, the remaining symbols are sequentially allocated with the probability values of the corresponding registered codewords.
    Type: Grant
    Filed: December 11, 1998
    Date of Patent: April 11, 2000
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 5933105
    Abstract: An apparatus encodes a binary shape signal by using a modified context-based arithmetic encoding technique. The apparatus computes a context number of each binary pixel in the binary shape signal based on its corresponding context. Then, a probability corresponding to the context number is detected and a state of each binary pixel is determined by comparing the probability with a preset threshold value. Furthermore, a predicted pixel value corresponding to each binary pixel is decided based on the probability. The predicted pixel value is compared with an original pixel value of each binary pixel to thereby output a mapping value representing whether the predicted pixel value is identical to the original pixel value or not. The apparatus generates a first and a second sequences by rearranging the mapping values of the binary pixels in the binary shape signal according to the states of the binary pixels and assigns adaptive probability sets to the first and the second sequences, respectively.
    Type: Grant
    Filed: January 23, 1998
    Date of Patent: August 3, 1999
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho
  • Patent number: 5929915
    Abstract: A method for encoding a binary shape signal determines as a mode of a target block a first and a second modes, if errors of the target block with respect to a first and a second reference blocks are not greater than a predetermined threshold, respectively. If the mode is not determined, the target block is motion estimated and compensated, a motion compensation error(MCE) and a motion vector difference(MVD) are calculated and the MVD is encoded if the MVD is not zero. Then the mode of the target block is set to a third mode if the MVD is zero and the MCE is not greater than the threshold and a fourth mode if the MVD is not zero and the MCE is not greater than the threshold. If the mode is not determined, intra-coded data and inter-coded data are generated, and the number of bits of the intra-coded data is compared with the one of the inter-coded data. If the number of bits of the intra-coded data is not greater than the one of the inter-coded data, the mode of the target block is decided to a fifth mode.
    Type: Grant
    Filed: December 2, 1997
    Date of Patent: July 27, 1999
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Sung-Ryul Cho