Abstract: There is provided a micromachined sensor for measuring a vibration, based on silicone micromachining technology, in which a conductor having elasticity is connected to masses moving due to a force generated by the vibration and the vibration is measured by using induced electromotive force generated due to the conductor moving in a magnetic field.

Abstract: There is provided a bidirectional readout circuit for detecting direction and amplitude of an oscillation sensed at a capacitive microelectromechanical system (MEMS) accelerometer, the bidirectional readout circuit converting capacitance changes of the capacitive MEMS accelerometer into a time change amount by using high resolution capacitance-to-time conversion technology and outputting the time change amount as the direction and the amplitude of the oscillation by using time-to-digital conversion (TDC) technology, thereby detecting not only the amplitude of the oscillation but also the direction thereof, which is capable of being applied to various MEMS sensors.

Abstract: A new photogate pixel structure for high performance CMOS Image Sensors is proposed. A new photogate structure is incorporated into the photodiode active-pixel structure. The proposed pixel structure exhibits the dynamic integration capacitance characteristics, which can be controlled by varying the control-voltage at the photogate node. Since the sensitivity is inversely proportional to the integration capacitance, the dynamic integration capacitance characteristics can provide the new functionality and controllability for high sensitivity and high dynamic range. At a low voltage level of the photogate, the pixel sensitivity of the new photogate pixel structure is maximized due to the minimum value of the integration capacitance. At a high voltage of the photogate, the dynamic range of the new structure can be maximized due to the increased well capacity. In addition, at an optimum bias voltage of the photogate, both the dynamic-range and the sensitivity can be simultaneously improved.

Abstract: A new photogate pixel structure for high performance CMOS Image Sensors is proposed. A new photogate structure is incorporated into the photodiode active-pixel structure. The proposed pixel structure exhibits the dynamic integration capacitance characteristics, which can be controlled by varying the control-voltage at the photogate node. Since the sensitivity is inversely proportional to the integration capacitance, the dynamic integration capacitance characteristics can provide the new functionality and controllability for high sensitivity and high dynamic range. At a low voltage level of the photogate, the pixel sensitivity of the new photogate pixel structure is maximized due to the minimum value of the integration capacitance. At a high voltage of the photogate, the dynamic range of the new structure can be maximized due to the increased well capacity. In addition, at an optimum bias voltage of the photogate, both the dynamic-range and the sensitivity can be simultaneously improved.

Abstract: A combined cache with main memory and a control method thereof, which can be configured with various structures of cache by only adding a minimized control circuit in order to be used as main memory. The N-way cache memory system includes N cache memory blocks receiving a tag field and an offset field of an address bus, a logic OR element for performing a logic OR operation with way hit signals from each cache memory block and for generating a cache hit signal when a way hit signal is produced in one of the cache memory blocks, and a first selection element for outputting data to a data bus, which results from the cache memory blocks in response to the way hit signal.

Abstract: This invention provides a clock generating apparatus that can control a skew between two-phase non-overlapping clocks in order to maintain constant non-overlapping period through an accurate analysis for the clock skew by a simple programming of delay. The invention has a delay block that receives first and second clock signals as inputs, and outputs them with delay. The invention also can control every skew in the chip and non-overlapping period of the first and the second clock signal by constituting the delay block being programmable.