Patents by Inventor Sung-Woo Han

Sung-Woo Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11981851
    Abstract: A quantum dot including a core comprising a first semiconductor nanocrystal including a zinc chalcogenide and a semiconductor nanocrystal shell disposed on the surface of the core and comprising zinc, selenium, and sulfur. The quantum dot does not comprise cadmium, emits blue light, and may exhibit a digital diffraction pattern obtained by a Fast Fourier Transform of a transmission electron microscopic image including a (100) facet of a zinc blende structure. In an X-ray diffraction spectrum of the quantum dot, a ratio of a defect peak area with respect to a peak area of a zinc blende crystal structure is less than about 0.8:1. A method of producing the quantum dot, and an electroluminescent device including the quantum dot are also disclosed.
    Type: Grant
    Filed: November 11, 2022
    Date of Patent: May 14, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Kun Su Park, Yuho Won, Jeong Hee Lee, Eun Joo Jang, Hyo Sook Jang, Yong Seok Han, Heejae Chung
  • Publication number: 20240140531
    Abstract: An embodiment vehicle body includes a front cross portion having a substantially uniform cross-section throughout its entire length, a rear cross portion spaced apart from the front cross portion, the rear cross portion having a substantially uniform cross-section throughout its entire length, and a connection structure connecting the front cross portion and the rear cross portion.
    Type: Application
    Filed: May 30, 2023
    Publication date: May 2, 2024
    Inventors: Seung Woo Han, Ju Tae Kim, Sung Gae Wee
  • Publication number: 20240140944
    Abstract: The present invention relates to a novel naphthyridinone derivative compound, a pharmaceutically acceptable salt thereof, a hydrate thereof, or a stereoisomer thereof, which are each relevant to a compound for inhibiting ENPP1, a composition for inhibiting ENPP1, and a method for inhibiting ENPP1.
    Type: Application
    Filed: December 29, 2021
    Publication date: May 2, 2024
    Applicant: TXINNO BIOSCIENCE INC.
    Inventors: Seo Jung Han, Chan Sun Park, Sung Joon Kim, Jae Eun Cheong, Jung Hwan Choi, Ali Imran, Sun Woo Lee, Yong Yea Park, Ah Ran Yu, Sun Young Park
  • Patent number: 11935984
    Abstract: A quantum dot including a core that includes a first semiconductor nanocrystal including zinc and selenium, and optionally sulfur and/or tellurium, and a shell that includes a second semiconductor nanocrystal including zinc, and at least one of sulfur or selenium is disclosed. The quantum dot has an average particle diameter of greater than or equal to about 13 nm, an emission peak wavelength in a range of about 440 nm to about 470 nm, and a full width at half maximum (FWHM) of an emission wavelength of less than about 25 nm. A method for preparing the quantum dot, a quantum dot-polymer composite including the quantum dot, and an electronic device including the quantum dot is also disclosed.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: March 19, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Yong Seok Han, Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Kun Su Park, Yuho Won, Jeong Hee Lee, Eun Joo Jang, Hyo Sook Jang
  • Publication number: 20240090252
    Abstract: An electroluminescent device including a first electrode and a second electrode facing each other; a light emitting layer disposed between the first electrode and the second electrode; and an electron transport layer disposed between the light emitting layer and the second electrode. The light emitting layer includes a plurality of semiconductor nanoparticles, and the electron transport layer includes a plurality of zinc oxide nanoparticles, the zinc oxide nanoparticles further include magnesium and gallium.
    Type: Application
    Filed: September 8, 2023
    Publication date: March 14, 2024
    Inventors: Sung Woo KIM, Tae Ho KIM, You Jung CHUNG, Taehyung KIM, Ilyoung LEE, Heejae LEE, Moon Gyu HAN
  • Publication number: 20240081001
    Abstract: A display device includes a display panel having a folding axis extending in a first direction; and a panel supporter disposed on a surface of the display panel. The panel supporter includes a first layer including a first base resin and first fiber yarns extending in the first direction and dispersed in the first base resin, a second layer disposed on the first layer, the second layer including a second base resin and second fiber yarns extending in a second direction intersecting the first direction and dispersed in the second base resin, and a third layer disposed on the second layer, the third layer including a third base resin and third fiber yarns extending in the first direction and dispersed in the third base resin.
    Type: Application
    Filed: May 1, 2023
    Publication date: March 7, 2024
    Applicant: Samsung Display Co., LTD.
    Inventors: Soh Ra HAN, Yong Hyuck LEE, Hong Kwan LEE, Hyun Jun CHO, Min Ji KIM, Sung Woo EO, Eun Gil CHOI, Sang Woo HAN
  • Publication number: 20240013512
    Abstract: A logo detection module includes a preprocessing unit extracts partial image data corresponding to a predetermined logo detection window region from image data, and acquire gray values based on RGB pixel values of a plurality of pixels included in the extracted partial image data, a logo template generation unit calculates a cumulative gray average value for each pixel based on the gray values of the plurality of pixels acquired using first partial image data, determine a logo pixel based on the calculated cumulative gray average value for each pixel, and generate a logo map including the logo pixel, and a logo compensation unit matches the plurality of pixels included in second partial image data extracted from second image data input after the logo map is generated and the logo pixels included in the logo map to calculate a matching rate, and determine logo compensation based on the calculated matching rate.
    Type: Application
    Filed: June 20, 2023
    Publication date: January 11, 2024
    Inventors: Hyeon Woon SHIN, Mun Cheol KIM, Seong Beom PARK, Sung Woo HAN
  • Patent number: 11837150
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel comprising a first display area having first resolution and a second display area having second resolution, the second resolution being lower than the first resolution, and a controller configured to generate display area information of each of the plurality of pixels, to blur an image that is displayed in the second display area based on the display area information, and to perform control such that the blurred image is displayed on the display panel.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: December 5, 2023
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Dae Hee Bae, Bo Sung Kim, Jun Hun Park, Ji Hong Yuk, Sung Woo Han, Ji Hoon Choi
  • Patent number: 11295661
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel comprising a first display area and a second display area, the second display area being disposed so as to overlap an optical module, and a controller configured to generate display area information of each of the plurality of pixels and border information of pixels provided in a border area located within a predetermined range from a border between the first display area and the second display area, to change an image that is displayed in at least one of the first display area or the second display area based on the display area information and the border information upon determining that the optical module is operated, and to perform control such that the changed image is displayed on the display panel.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: April 5, 2022
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Dae Hee Bae, Bo Sung Kim, Jun Hun Park, Ji Hong Yuk, Sung Woo Han, Ji Hoon Choi
  • Patent number: 11289050
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel including a first display area having first resolution and a second display area having second resolution, the second resolution being lower than the first resolution, and a controller configured to generate border information of pixels provided in a border area located within a predetermined range from the border between the first display area and the second display area, to correct an image that is displayed in the border area based on the border information, and to perform control such that the corrected image is displayed on the display panel.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: March 29, 2022
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Dae Hee Bae, Bo Sung Kim, Jun Hun Park, Ji Hong Yuk, Sung Woo Han, Ji Hoon Choi
  • Patent number: 11114009
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, each of the pixels including at least two subpixels, the display panel including a first display area and a second display area, the second display area being disposed to overlap an optical module, a memory configured to store shape information of the second display area including position information of a starting point, vertical length information of the second display area, and line-based direction information and width information indicating the border of the second display area, and a controller configured to change an image that is displayed in at least one of the first display area and the second display area using the shape information of the second display area and to perform control such that the changed image is displayed on the display panel.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: September 7, 2021
    Assignee: SILICON WORKS CO., LTD.
    Inventors: Dae Hee Bae, Bo Sung Kim, Jun Hun Park, Ji Hong Yuk, Sung Woo Han, Ji Hoon Choi
  • Publication number: 20210049980
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel including a first display area having first resolution and a second display area having second resolution, the second resolution being lower than the first resolution, and a controller configured to generate border information of pixels provided in a border area located within a predetermined range from the border between the first display area and the second display area, to correct an image that is displayed in the border area based on the border information, and to perform control such that the corrected image is displayed on the display panel.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Dae Hee BAE, Bo Sung KIM, Jun Hun PARK, Ji Hong YUK, Sung Woo HAN, Ji Hoon CHOI
  • Publication number: 20210049955
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel comprising a first display area and a second display area, the second display area being disposed so as to overlap an optical module, and a controller configured to generate display area information of each of the plurality of pixels and border information of pixels provided in a border area located within a predetermined range from a border between the first display area and the second display area, to change an image that is displayed in at least one of the first display area or the second display area based on the display area information and the border information upon determining that the optical module is operated, and to perform control such that the changed image is displayed on the display panel.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Dae Hee BAE, Bo Sung KIM, Jun Hun PARK, Ji Hong YUK, Sung Woo HAN, Ji Hoon CHOI
  • Publication number: 20210049945
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, each of the pixels including at least two subpixels, the display panel including a first display area and a second display area, the second display area being disposed to overlap an optical module, a memory configured to store shape information of the second display area including position information of a starting point, vertical length information of the second display area, and line-based direction information and width information indicating the border of the second display area, and a controller configured to change an image that is displayed in at least one of the first display area and the second display area using the shape information of the second display area and to perform control such that the changed image is displayed on the display panel.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Dae Hee BAE, Bo Sung KIM, Jun Hun PARK, Ji Hong YUK, Sung Woo HAN, Ji Hoon CHOI
  • Publication number: 20210049950
    Abstract: Disclosed is a display device including a display panel having a plurality of pixels, the display panel comprising a first display area having first resolution and a second display area having second resolution, the second resolution being lower than the first resolution, and a controller configured to generate display area information of each of the plurality of pixels, to blur an image that is displayed in the second display area based on the display area information, and to perform control such that the blurred image is displayed on the display panel.
    Type: Application
    Filed: August 14, 2020
    Publication date: February 18, 2021
    Inventors: Dae Hee BAE, Bo Sung KIM, Jun Hun PARK, Ji Hong YUK, Sung Woo HAN, Ji Hoon CHOI
  • Patent number: 9609742
    Abstract: Package substrates are provided. The package substrate may include a power line and a ground line on a first surface of a substrate body; a plurality of signal lines on the first surface between the power line and the ground line; and a lower ground pattern and a lower power pattern positioned on a second surface of the substrate body opposite to the first surface. The lower ground pattern may be disposed to be opposite to the power line and the lower power pattern may be disposed to be opposite to the ground line. Related semiconductor packages are also provided.
    Type: Grant
    Filed: August 30, 2013
    Date of Patent: March 28, 2017
    Assignee: SK hynix Inc.
    Inventors: Eul Chul Jang, Qwan Ho Chung, Sang Joon Lim, Sung Woo Han
  • Patent number: 9595498
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: March 14, 2017
    Assignee: SK HYNIX INC.
    Inventors: Chang Kun Park, Seong Hwi Song, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Ic Su Oh, Hyung Soo Kim, Tae Jin Hwang, Hae Rang Choi, Ji Wang Lee, Jae Min Jang
  • Publication number: 20160104684
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Application
    Filed: December 7, 2015
    Publication date: April 14, 2016
    Inventors: Chang Kun PARK, Seong Hwi SONG, Yong Ju KIM, Sung Woo HAN, Hee Woong SONG, Ic Su OH, Hyung Soo KIM, Tae Jin HWANG, Hae Rang CHOI, Ji Wang LEE, Jae Min JANG
  • Patent number: 9276500
    Abstract: A reservoir capacitor includes a first capacitor group having two or more capacitors, which are serially coupled to each other between a first power voltage supply terminal and a second power voltage supply terminal, a second capacitor group having two or more capacitors, which are serially coupled to each other between a third power voltage supply terminal and a fourth power voltage supply terminal and a connection line suitable for electrically coupling a first coupling node between the capacitors of the first capacitor group to a second coupling node between the capacitors of the second capacitor group.
    Type: Grant
    Filed: December 15, 2013
    Date of Patent: March 1, 2016
    Assignee: SK Hynix Inc.
    Inventors: Boo-Ho Jung, Sung-Woo Han, Ic-Su Oh, Jun-Ho Lee, Hyun-Seok Kim, Sun-Ki Cho, Tae-Hoon Kim, Ki-Chul Hong
  • Patent number: 9209145
    Abstract: A semiconductor memory device includes a semiconductor circuit substrate having a chip pad forming region. A pair of data lines are formed on the semiconductor circuit substrate at one side of the chip pad region. The pair of data lines extend along a direction that the chip pad region of the semiconductor circuit substrate extends. The pair of data lines are arranged to be adjacent to each other and receive a pair of differential data signals. A power supply line is formed on the semiconductor circuit substrate at the other side of the chip pad region. The power supply line extends along the direction that the chip pad region of the semiconductor circuit substrate extends, and the power supply line receives power.
    Type: Grant
    Filed: November 21, 2014
    Date of Patent: December 8, 2015
    Assignee: SK Hynix Inc.
    Inventors: Chang Kun Park, Seong Hwi Song, Yong Ju Kim, Sung Woo Han, Hee Woong Song, Ic Su Oh, Hyung Soo Kim, Tae Jin Hwang, Hae Rang Choi, Ji Wang Lee, Jae Min Jang