Patents by Inventor Sunil Bhardwaj

Sunil Bhardwaj has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Techniques for reducing disturbance in a semiconductor memory device
    Patent number: 9812179
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: November 7, 2017
    Assignee: OVONYX MEMORY TECHNOLOGY, LLC
    Inventors: Jungtae Kwon, David Kim, Sunil Bhardwaj
  • TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20140307512
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Application
    Filed: June 24, 2014
    Publication date: October 16, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jungtae KWON, David KIM, Sunil BHARDWAJ
  • Techniques for reducing disturbance in a semiconductor memory device
    Patent number: 8760906
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: June 24, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Jungtae Kwon, David Kim, Sunil Bhardwaj
  • Techniques for reducing disturbance in a semiconductor memory device
    Patent number: 8699289
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: April 15, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Jungtae Kwon, David Kim, Sunil Bhardwaj
  • TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20140056090
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Application
    Filed: November 1, 2013
    Publication date: February 27, 2014
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jungtae KWON, David KIM, Sunil BHARDWAJ
  • TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR MEMORY DEVICE
    Publication number: 20120218847
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Application
    Filed: May 7, 2012
    Publication date: August 30, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Jungtae KWON, David KIM, Sunil BHARDWAJ
  • Techniques for reducing disturbance in a semiconductor device
    Patent number: 8174881
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Grant
    Filed: November 24, 2009
    Date of Patent: May 8, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Jungtae Kwon, David Kim, Sunil Bhardwaj
  • TECHNIQUES FOR REDUCING DISTURBANCE IN A SEMICONDUCTOR DEVICE
    Publication number: 20110122687
    Abstract: Techniques for reducing disturbance in a semiconductor memory device are disclosed. In one particular exemplary embodiment, the techniques may be realized as a semiconductor memory device having reduced disturbance. The semiconductor memory device may comprise a plurality of memory cells arranged in arrays of rows and columns. The semiconductor memory device may also comprise a plurality of data sense amplifiers, coupled to the plurality of memory cells, configured to perform one or more operations during an operation/access cycle, wherein the operation/access cycle may comprise an operation segment and a disturbance recovery segment.
    Type: Application
    Filed: November 24, 2009
    Publication date: May 26, 2011
    Applicant: Innovative Silicon ISi SA
    Inventors: Jungtae Kwon, David Kim, Sunil Bhardwaj