Patents by Inventor Sunil Hattangady

Sunil Hattangady has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6780719
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% O2); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: August 24, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Rajesh Khamankar, James J. Chambers, Sunil Hattangady, Antonio L. P. Rotondaro
  • Patent number: 6632747
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer by providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% 02); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.) in nitrogen-comprising atmosphere (preferably N2/O2 or N2O/H2); annealing by rapid thermal heating in ammonia of reduced pressure (preferably at 600 to 1000° C.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar, Sunil Hattangady
  • Publication number: 20030173615
    Abstract: In a workpiece for producing an apparatus having a flash memory array integrally formed with another device on a common substrate, a method for preparing the workpiece for high temperature oxidation processing permits a controllable short distance between adjacent components in the flash memory array. The workpiece includes a substrate sector configured for presenting a plurality of source elements and a plurality of drain elements for the flash memory array. The workpiece further includes a plurality of polysilicon lands arranged with the plurality of source elements and the plurality of drain elements for employment as floating gate structures in the flash memory array. The method includes the steps of: (a) growing an oxide material upon the workpiece substantially covering the workpiece; and (b) treating the oxide material with a nitrous oxide material. The treating is effected under conditions appropriate to establish a nitrogen-rich layer upon the oxide material.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 18, 2003
    Inventors: Kemal Tamer San, Sunil Hattangady
  • Patent number: 6610614
    Abstract: A method of forming an ultra-thin dielectric layer, including the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: August 26, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Sunil Hattangady, Rajesh Khamankar
  • Publication number: 20030157773
    Abstract: A method for manufacturing a semiconductor device includes forming a first layer adjacent a semiconductor substrate. The first layer may comprise oxygen. The first layer may be subjected to a material comprising nitrogen to form a second layer. The second layer may be oxidized to form a dielectric layer which may have a relatively uniform nitrogen profile. Rapid thermal oxidation may be used to form the dielectric layer. The dielectric layer may have a physical thickness greater than a physical thickness of the second layer.
    Type: Application
    Filed: March 13, 2003
    Publication date: August 21, 2003
    Inventors: Jerry Hu, Paul E. Nicollian, Kwame N. Eason, Rajesh Khamankar, Mark S. Rodder, Sunil Hattangady
  • Publication number: 20030080389
    Abstract: A method for manufacturing a semiconductor device includes forming a first layer adjacent a semiconductor substrate. The first layer may comprise oxygen. The first layer may be subjected to a material comprising nitrogen to form a second layer. The second layer may be oxidized to form a dielectric layer which may have a relatively uniform nitrogen profile. Rapid thermal oxidation may be used to form the dielectric layer. The dielectric layer may have a physical thickness greater than a physical thickness of the second layer.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 1, 2003
    Inventors: Jerry Hu, Kwame N. Eason, Rajesh Khamankar, Mark S. Rodder, Paul E. Nicollian, Sunil Hattangady
  • Publication number: 20020197880
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Sunil Hattangady, Rajesh Khamankar
  • Publication number: 20020197886
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Rajesh Khamankar, James J. Chambers, Sunil Hattangady, Antonio L.P. Rotondaro
  • Publication number: 20020197883
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar, Sunil Hattangady
  • Patent number: 6423648
    Abstract: A method of forming an ultra-thin gate oxide (14) for a field effect transistor (10). The gate oxide (14) is formed by combining an oxidizing agent (e.g., N2O, CO2) with an etching agent (e.g., H2) and adjusting the partial pressures to controllably grow a thin (˜12 Angstroms) high quality oxide (14).
    Type: Grant
    Filed: December 14, 2000
    Date of Patent: July 23, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Ming Hwang, Paul Tiner, Sunil Hattangady
  • Patent number: 6352941
    Abstract: A method of forming an ultra-thin gate oxide (14) for a field effect transistor (10). The gate oxide (14) is formed by combining an oxidizing agent (e.g., N2O, CO2) with an etching agent (e.g., H2) and adjusting the partial pressures to controllably grow a thin (˜12 Angstroms) high quality oxide (14).
    Type: Grant
    Filed: July 8, 1999
    Date of Patent: March 5, 2002
    Assignee: Texas Instruments Incorporated
    Inventors: Ming Hwang, Paul Tiner, Sunil Hattangady
  • Publication number: 20020025626
    Abstract: This invention pertains generally to the integration of dielectrics with integrated circuits, and more particularly to reaction barriers between high-k dielectrics and an underlying Group IV semiconductor layer. Applications for high permittivity memory cells and gate dielectrics are disclosed. This method has steps of providing a partially completed integrated circuit having a semiconductor layer substantially comprising silicon, where the layer has an exposed face. The method also includes forming an ultra-thin SiC reaction barrier at the exposed face, and depositing a high permittivity storage dielectric on the SiC reaction barrier. Typically, the SiC reaction barrier is less than 25 Å thick, preferably one or two monolayers of SiC.
    Type: Application
    Filed: August 27, 2001
    Publication date: February 28, 2002
    Inventors: Sunil Hattangady, Robert M. Wallace, Bruce E. Gnade, Yasutoshi Okuno
  • Publication number: 20010001074
    Abstract: A method of forming an ultra-thin gate oxide (14) for a field effect transistor (10). The gate oxide (14) is formed by combining an oxidizing agent (e.g., N2O, CO2) with an etching agent (e.g., H2) and adjusting the partial pressures to controllably grow a thin (˜12 Angstroms) high quality oxide (14).
    Type: Application
    Filed: December 14, 2000
    Publication date: May 10, 2001
    Inventors: Ming Hwang, Paul Tiner, Sunil Hattangady
  • Patent number: 6136654
    Abstract: An embodiment of the instant invention is a method of forming a dielectric layer, the method comprising the steps of: providing a semiconductor substrate (substrate 12), the substrate having a surface; forming an oxygen-containing layer (layer 14) on the semiconductor substrate; and subjecting the oxygen-containing layer to a nitrogen containing plasma (plasma 16) so that the nitrogen is either incorporated into the oxygen-containing layer (see regions 18, 19, and 20) or forms a nitride layer at the surface of the substrate (region 22). Using this embodiment of the instant invention, the dielectric layer can be substantially free of hydrogen. Preferably, the oxygen-containing layer is an SiO.sub.2 layer or it is comprised of oxygen and nitrogen (preferably an oxynitride layer). The plasma is, preferably, a high-density plasma. Preferably, a source of nitrogen is introduced to the plasma to form the nitrogen containing plasma. The source of nitrogen is preferably comprised of a material consisting of: N.sub.
    Type: Grant
    Filed: December 4, 1997
    Date of Patent: October 24, 2000
    Assignee: Texas Instruments Incorporated
    Inventors: Robert Kraft, Sunil Hattangady, Douglas T. Grider
  • Patent number: 5168330
    Abstract: A semiconductor device including a single crystal semiconductor host material having a surface; an ultrathin pseudomorphic single crystal epitaxial interlayer formed on the surface of the host material, wherein the interlayer is formed of a material and has a thickness selected so that the material of the interlayer is elastically deformed on the surface of the host material to match the lattice constant of the interlayer material with the lattice constant of the host material; and a further material incompatible with the host material when interfaced directly with the host material, but compatible with the interlayer, provided on the interlayer and thereby interfaced with the host material to perform a predetermined function with respect to the interlayer and the host material.
    Type: Grant
    Filed: December 3, 1990
    Date of Patent: December 1, 1992
    Assignee: Research Triangle Institute
    Inventors: Daniel J. Vitkavage, Gaius G. Fountain, Sunil Hattangady, Ronald A. Rudder, Robert J. Markunas