Abstract: Embodiments of the present invention provide a system and method for determining a magnitude of current driving LEDs by sensing a current through a switching transistor and extracting the information of the LED current based on a relationship between the current through the switching transistor and the current driving the LEDs.

Abstract: Various embodiments of the invention provide power factor correction in solid state lighting applications. In certain embodiments, an LED driver for an LED array is controlled for power factor correction by a control circuit block. The control circuit block comprises electronic circuitry that enables the input current to the LED driver to be measured and controlled. This control circuit block comprises at least one switching device that enables an alternating form of current at a particular frequency to be applied to the LED array regardless of whether the main power source is a DC or AC power source.

Abstract: The invention relates to a light emitting diode (“LED”) illumination system, and more particularly, to systems, devices and methods of driving a LED module by a current generator that is powered and controlled by a regulated dc voltage associated with a brightness level. Such a dimmable LED illumination system is compatible with both a high-voltage ac signal coupled from any wall outlet and a low-voltage ac signal provided by an electronic transformer. A diode bridge rectifies the ac signal to a rectified ac signal, and a LED driver generates the LED current from the rectified ac signal and drives the LED to the brightness level. Within the LED driver, the level of the LED current is determined from a boost voltage that is substantially a regulated dc voltage generated from the rectified ac signal.

Abstract: Embodiments of the present invention provide a system and method for controlling the amplitude of a current from a diode bridge into an EMI filter and LED array. Due to the manner in which certain dimmers (i.e., leading edge dimmers) operate, there is a delay on its output in transmitting a voltage when the voltage crosses zero.

Abstract: An apparatus and method provides a driver circuit that provides for power factor correction (PFC) to a load, such as a solid-state lighting (SSL) device, such as, for example, a light emitting diode (LED) or an array or cluster of LEDs. A programmable reference is provided in the circuit to operate in a fixed frequency peak current mode control (FFPCMC) or in a fixed frequency average current mode control (FFACMC). A driver circuit is employed to operate the SSL device using power derived from a main power source which may be DC or AC. In a FFPCMC embodiment, a programmable power reference is programmed to be a fixed DC voltage. In a FFACMC embodiment, source input current to the circuit can be programmed to be proportional to the rectified AC voltage after a bridge rectifier.

Abstract: The invention relates to a light emitting diode (LED) illumination system, and more particularly, to systems, devices and methods of rapidly ramping up a transformer current and a LED driver current by coupling a transformer load compensation circuitry to an output of an electronic transformer. A bridge rectifier is coupled to the electronic transformer and provides full-wave rectification to an AC supply at the output of the electronic transformer. The load compensation circuitry senses the rectified AC supply and compensates the load of the electronic transformer, such that the electronic transformer starts up properly when the level of the signal envelope is below a threshold voltage. Therefore, the load compensation circuit is active for a programmed time during which the LED driver current has been increased to a sufficient value to keep the electronic transformer operational.

Abstract: Embodiments of the present invention provide a system and method for controlling the amplitude of a current from a diode bridge into an EMI filter and LED array. Due to the manner in which certain dimmers (i.e., leading edge dimmers) operate, there is a delay on its output in transmitting a voltage when the voltage crosses zero.

Abstract: Various embodiments of the invention provide power factor correction in solid state lighting applications. In certain embodiments, an LED driver for an LED array is controlled for power factor correction by a control circuit block. The control circuit block comprises electronic circuitry that enables the input current to the LED driver to be measured and controlled. This control circuit block comprises at least one switching device that enables an alternating form of current at a particular frequency to be applied to the LED array regardless of whether the main power source is a DC or AC power source.

Abstract: Embodiments of the present invention provide a system and method for determining a magnitude of current driving LEDs by sensing a current through a switching transistor and extracting the information of the LED current based on a relationship between the current through the switching transistor and the current driving the LEDs.

Abstract: An apparatus and method provides a driver circuit that provides for power factor correction (PFC) to a load, such as a solid-state lighting (SSL) device, such as, for example, a light emitting diode (LED) or an array or cluster of LEDs. A programmable reference is provided in the circuit to operate in a fixed frequency peak current mode control (FFPCMC) or in a fixed frequency average current mode control (FFACMC). A driver circuit is employed to operate the SSL device using power derived from a main power source which may be DC or AC. In a FFPCMC embodiment, a programmable power reference is programmed to be a fixed DC voltage. In a FFACMC embodiment, source input current to the circuit can be programmed to be proportional to the rectified AC voltage after a bridge rectifier.

Abstract: An IC including skew-programmable clock buffers, fixed skew logic circuit, an external interface and a skew controller. Each skew-programmable clock buffer receives a distributed clock signal and provides a corresponding local clock signal having a programmed skew. The fixed logic circuit enables permanent programming of static skew values and the external interface enables programming of dynamic skew values. The skew controller selects between the static and dynamic skew values and programs the skew-programmable clock buffers based on selected skew values. In one embodiment, the skew controller is operative to detect a skew over-ride command upon reset of the IC and to select between the static and dynamic skew values based on the skew over-ride command. The programmable memory may be integrated on the IC or externally coupled via the external interface. The fixed skew logic circuit is implemented as any type of permanent programmable block, such as laser-blown fuses, an EPROM, etc.

Abstract: An IC including skew-programmable clock buffers, fixed skew logic, an external interface and a skew controller. Each skew-programmable clock buffer receives a distributed clock signal and provides a corresponding local clock signal having a programmed skew. The fixed skew logic enables permanent programming of static skew values and the external interface enables programming of dynamic skew values. The skew controller selects between the static and dynamic skew values and programs the skew-programmable clock buffers based on selected skew values. In one embodiment, the skew controller is operative to detect a skew over-ride command upon reset of the IC and to select between the static and dynamic skew values based on the skew over-ride command. The programmable memory may be integrated on the IC or externally coupled via the external interface. The fixed skew logic is implemented as any type of permanent programmable block, such as laser-blown fuses, an EPROM, etc.

Abstract: An electrically isolated high speed optical switching arrangement for use as a computer over-voltage sensing circuit utilizing first and second optoisolator devices, the first having an input, a first signal from the output of a bus sensing circuitry which provides two complementary outputs, with the output voltage of the optoisolator controlling power-down circuitry for the computer in response to an over-voltage condition. A second control optoisolator has its output in parallel with a resistor in the base to emitter path of the first optoisolator. The complementary signal of the bus-sensing circuitry provides the input to the second optoisolator. During normal power conditions, the first optoisolator is conductive and the second is non-conductive.