Patents by Inventor Susan C. Lee

Susan C. Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7548897
    Abstract: The Mission Centric Network Defense System (MCNDS) is a deployable network defense system that monitors network activities, generates and maintains situational awareness of operational activities, and uses this joint situational awareness of networked and operational activities to predict the mission impact of alterations and disruptions of networked resources. The MCNDS uses its predictive capability to rank information operation (IO) courses-of-action (COAs) and interpret network alarms and intrusion detections in terms of expected operational mission impact.
    Type: Grant
    Filed: October 2, 2003
    Date of Patent: June 16, 2009
    Assignee: The Johns Hopkins University
    Inventors: George R. Barrett, Susan C. Lee
  • Publication number: 20040136378
    Abstract: The Mission Centric Network Defense System (MCNDS) is a deployable network defense system that monitors network activities, generates and maintains situational awareness of operational activities, and uses this joint situational awareness of networked and operational activities to predict the mission impact of alterations and disruptions of networked resources. The MCNDS uses its predictive capability to rank information operation (IO) courses-of-action (COAs) and interpret network alarms and intrusion detections in terms of expected operational mission impact.
    Type: Application
    Filed: October 2, 2003
    Publication date: July 15, 2004
    Inventors: George R. Barrett, Susan C. Lee
  • Publication number: 20040088341
    Abstract: A method for converting an n-dimensional vector to a two-dimensional vector to enable visualization of the n-dimensional vector. The method includes obtaining an n-dimensional reference vector and determining a difference in length and angle between the n-dimensional vector and the reference vector; and determining two-dimensional coordinates of the two-dimensional vector based on the difference in length and angle.
    Type: Application
    Filed: June 4, 2003
    Publication date: May 6, 2004
    Inventor: Susan C Lee
  • Publication number: 20040059947
    Abstract: An intrusion detection system comprising a hierarchy of neural networks that functions as a true anomaly detector is disclosed. Detection of an anomaly is achieved by monitoring selected areas of network behavior, such as protocols, that are predictable in advance. The neural networks are trained using data that spans the space of network or system inputs. The desired neural network output used during training is determined using the known properties of the network behavior. The trained detector recognizes attacks that were not specifically presented during training. In fact, using small detectors in a hierarchy structure provides gives a better result than a single large detector.
    Type: Application
    Filed: June 4, 2003
    Publication date: March 25, 2004
    Inventor: Susan C. Lee
  • Publication number: 20040054505
    Abstract: A hierarchical neural network for monitoring network functions and that functions as a true anomaly detector is disclosed. Detection of an anomaly is achieved by monitoring selected areas of network behavior, such as protocols, that are predictable in advance. Combining outputs of neural networks within the hierarchical network yields satisfactory anomaly detection.
    Type: Application
    Filed: June 4, 2003
    Publication date: March 18, 2004
    Inventor: Susan C. Lee
  • Patent number: 5107457
    Abstract: An efficient hardware cache manager controls the top-of-stack data underflow/overflow. A processor chip includes a processor, a stack buffer and the invented cache management hardware. The processor chip communicates with a remove overflow stack through an address/data bus. The cache management hardware efficiently manages overflow and underflow to and from the processor chip in such a manner less than 1% of the processor's time is spent managing the stack cache.
    Type: Grant
    Filed: April 3, 1989
    Date of Patent: April 21, 1992
    Assignee: The Johns Hopkins University
    Inventors: John R. Hayes, Susan C. Lee