Patents by Inventor Susumu Kondo

Susumu Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240099155
    Abstract: A memory includes: a magnet including a first and second portions adjacent in a first direction. The first portion has a first dimension in a second direction at a first position at which a dimension of the magnet in the second direction is maximum, the second direction perpendicular to the first direction, the second portion has a second dimension in the second direction at a second position at which a dimension of the magnet in the second direction is minimum, the second dimension smaller than the first dimension, the first portion is continuous to the second portion via a third position between the first and second positions, a curve corresponding to an outer of the magnet extends between the first and third positions, and the curve passes through a side closer to the central axis of the magnet than a straight line connecting the first and second positions.
    Type: Application
    Filed: September 11, 2023
    Publication date: March 21, 2024
    Applicant: Kioxia Corporation
    Inventors: Masahiro KOIKE, Michael Arnaud QUINSAT, Nobuyuki UMETSU, Tsutomu NAKANISHI, Agung SETIADI, Megumi YAKABE, Shigeyuki HIRAYAMA, Masaki KADO, Yasuaki OOTERA, Shiho NAKAMURA, Susumu HASHIMOTO, Tsuyoshi KONDO
  • Patent number: 7060518
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: June 13, 2006
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Publication number: 20060030065
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Application
    Filed: September 30, 2005
    Publication date: February 9, 2006
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Patent number: 6990131
    Abstract: A semiconductor optical device includes a multilayer structure and buried layers. The multilayer structure is constituted by a cladding layer having an n-type conductivity, an active region formed from an active layer or photoabsorption layer, and a cladding layer having a p-type conductivity which are successively formed on a semiconductor substrate having the first crystallographic orientation. The buried layers are made of a ruthenium-doped semi-insulating semiconductor crystal and formed on two sides of the mesa-stripe-like multilayer structure.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: January 24, 2006
    Assignee: Nippon Telegraph & Telephone Corporation
    Inventors: Ryuzo Iga, Susumu Kondo, Matsuyuki Ogasawara, Yasuhiro Kondo
  • Patent number: 6982469
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Grant
    Filed: February 9, 2004
    Date of Patent: January 3, 2006
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Patent number: 6815786
    Abstract: A semiconductor optical device includes, on a semiconductor substrate, a mesa-stripe-like multilayer structure constituted by at least an n-cladding layer, an active region formed from an active layer or a photoabsorption layer, and a p-cladding layer, and a buried layer in which two sides of the multilayer structured are buried using a semi-insulating semiconductor crystal. The buried layer includes a diffusion enhancement layer which is adjacent to the mesa-stripe-like multilayer structure and enhances diffusion of a p-impurity, and a diffusion suppression layer which is adjacent to the diffusion enhancement layer and suppresses diffusion of a p-impurity. A method of manufacturing a semiconductor optical device is also disclosed.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: November 9, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Matsuyuki Ogasawara, Susumu Kondo, Ryuzo Iga, Yasuhiro Kondo
  • Publication number: 20040159847
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Application
    Filed: February 9, 2004
    Publication date: August 19, 2004
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Patent number: 6717187
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: April 6, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Patent number: 6692837
    Abstract: A semi-insulating InP substrate in which a Ru-doped semi-insulating semiconductor layer is formed on the surface is provided, wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property. The semiconductor optical device is fabricated by forming the Ru-doped semi-insulating semiconductor layer on a Fe-doped semi-insulating InP substrate, and forming a semiconductor crystal layer to which a p-type impurity is doped.
    Type: Grant
    Filed: May 10, 2002
    Date of Patent: February 17, 2004
    Assignee: Nippon Telegraph and Telephone Corporation
    Inventors: Ryuzo Iga, Matsuyuki Ogasawara, Susumu Kondo, Yasuhiro Kondo
  • Publication number: 20030067010
    Abstract: A semiconductor optical device includes a multilayer structure and buried layers. The multilayer structure is constituted by a cladding layer having an n-type conductivity, an active region formed from an active layer or photoabsorption layer, and a cladding layer having a p-type conductivity which are successively formed on a semiconductor substrate having the first crystallographic orientation. The buried layers are made of a ruthenium-doped semi-insulating semiconductor crystal and formed on two sides of the mesa-stripe-like multilayer structure.
    Type: Application
    Filed: August 16, 2002
    Publication date: April 10, 2003
    Inventors: Ryuzo Iga, Susumu Kondo, Matsuyuki Ogasawara, Yasuhiro Kondo
  • Publication number: 20030042495
    Abstract: A semiconductor optical device includes, on a semiconductor substrate, a mesa-stripe-like multilayer structure constituted by at least an n-cladding layer, an active region formed from an active layer or a photoabsorption layer, and a p-cladding layer, and a buried layer in which two sides of the multilayer structured are buried using a semi-insulating semiconductor crystal. The buried layer includes a diffusion enhancement layer which is adjacent to the mesa-stripe-like multilayer structure and enhances diffusion of a p-impurity, and a diffusion suppression layer which is adjacent to the diffusion enhancement layer and suppresses diffusion of a p-impurity. A method of manufacturing a semiconductor optical device is also disclosed.
    Type: Application
    Filed: August 16, 2002
    Publication date: March 6, 2003
    Inventors: Matsuyuki Ogasawara, Susumu Kondo, Ryuzo Iga, Yasuhiro Kondo
  • Publication number: 20020187580
    Abstract: A semiconductor optical device includes a semiconductor substrate and a stacked body formed by at least a first cladding layer, an active region and a second cladding layer; wherein both sides of the stacked body are buried by a burying layer formed by a semi-insulating semiconductor crystal; the burying layer includes a first layer that is placed adjacent to both sides of the stacked body and a second layer that is placed adjacent to the first layer; the first layer includes Ru as a dopant; composition of the second layer is different from the composition of the first layer, or a dopant of the second layer is different from the dopant of the first layer. The device can also be configured such that the width of the active region is smaller than the width of the cladding layers of the stacked body; and a Ru-doped semi-insulating layer is provided in a space between the burying layer and the active region in both sides of the active region.
    Type: Application
    Filed: April 18, 2002
    Publication date: December 12, 2002
    Inventors: Susumu Kondo, Matsuyuki Ogasawara, Ryuzo Iga, Yasuhiro Kondo, Yoshio Noguchi, Masahiro Yuda, Ken Tsuzuki, Satoshi Oku
  • Publication number: 20020168856
    Abstract: A semi-insulating InP substrate in which a Ru-doped semi-insulating semiconductor layer is formed on the surface is provided, wherein the Ru-doped semi-insulating semiconductor layer has a complete semi-insulating property. The semiconductor optical device is fabricated by forming the Ru-doped semi-insulating semiconductor layer on a Fe-doped semi-insulating InP substrate, and forming a semiconductor crystal layer to which a p-type impurity is doped.
    Type: Application
    Filed: May 10, 2002
    Publication date: November 14, 2002
    Inventors: Ryuzo Iga, Matsuyuki Ogasawara, Susumu Kondo, Yasuhiro Kondo
  • Patent number: 5646643
    Abstract: A wiring 19 of a device directly detects a voltage from a plurality of scanning electrodes 1, a voltage detecting electrode 701 detects a voltage from a plurality of the scanning electrodes 1. A voltage variation component such as voltage distortion of the detected voltage which adversely affects on an image display is taken out, inverted, and negative fed back to the scanning electrode 1. A negative feedback loop provides the negative feedback of the voltage detected from and fed back to the scanning electrode 1, this therefore suppresses the disadvantageous voltage variation such as a distortion voltage which tends to arise in the scanning electrode 1.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: July 8, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hoko Hirai, Susumu Kondo
  • Patent number: 5619221
    Abstract: A wiring 19 of a device directly detects a voltage from a plurality of scanning electrodes 1, a voltage detecting electrode 701 detects a voltage from a plurality of the scanning electrodes 1. A voltage variation component such as voltage distortion of the detected voltage which adversely affects on an image display is taken out, inverted, and negative fed back to the scanning electrode 1. A negative feedback loop provides the negative feedback of the voltage detected from and fed back to the scanning electrode 1, this therefore suppresses the disadvantageous voltage variation such as a distortion voltage which tends to arise in the scanning electrode 1.
    Type: Grant
    Filed: December 1, 1994
    Date of Patent: April 8, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hoko Hirai, Susumu Kondo
  • Patent number: 5606342
    Abstract: In liquid crystal display system 10 which has a matrix arrangement of scanning electrode group 12 and data electrode group 13 and in which each electrode group is driven by a pulse like waveform, this is a liquid crystal display system in which a lower level region than the pulse wave peak value is formed in at least one of the rising or the falling portions of the pulse wave which drives at least one of the electrode groups.A liquid crystal display system with a uniform display with extremely little display non-uniformity can be obtained.
    Type: Grant
    Filed: March 6, 1995
    Date of Patent: February 25, 1997
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Masato Shoji, Hoko Hirai, Susumu Kondo, Akio Murayama
  • Patent number: 5434599
    Abstract: A wiring 19 of a device directly detects a voltage from a plurality of scanning electrodes 1, a voltage detecting electrode 701 detects a voltage from a plurality of the scanning electrodes 1. A voltage variation component such as voltage distortion of the detected voltage which adversely affects on an image display is taken out, inverted, and negative fed back to the scanning electrode 1. A negative feedback loop provides the negative feedback of the voltage detected from and fed back to the scanning electrode 1, this therefore suppresses the disadvantageous voltage variation such as a distortion voltage which tends to arise in the scanning electrode 1.
    Type: Grant
    Filed: May 13, 1993
    Date of Patent: July 18, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Hoko Hirai, Susumu Kondo
  • Patent number: 5422095
    Abstract: There is disclosed an imaging agent for diagnosis comprising a compound composed of a polynuclear type compound of the formula I or II: ##STR1## wherein each X is a hydrogen atom or a bifunctional ligand, at least one of them are bifunctional ligand and m or n is an integer of 1 to 6, and at least one metal ion being coordinated with at least one bifunctional ligand moiety, said metal ion being selected from the group consisting of metal ions having the atomic number of 21-29, 31, 32, 37-39, 42-44, 49 and 56-83.
    Type: Grant
    Filed: April 4, 1994
    Date of Patent: June 6, 1995
    Assignee: Nihon Medi-Physics Co., Ltd.
    Inventors: Yuji Hashiguchi, Kumiko Iwai, Shigemi Seri, Susumu Kondo, Makoto Azuma
  • Patent number: 5352431
    Abstract: There is disclosed an imaging agent for diagnosis comprising a compound composed of a polynuclear type compound of the formula I or II: ##STR1## wherein each X is a hydrogen atom or a bifunctional ligand, at least one of them are bifunctional ligand and m or n is an integer or 1 to 6, and at least one metal ion being coordinated with at least one bifunctional ligand moiety, said metal ion being selected from the group consisting of metal ions having the atomic number of 21-29, 31, 32, 37-39, 42-44, 49 and 56-83.
    Type: Grant
    Filed: September 13, 1993
    Date of Patent: October 4, 1994
    Assignee: Nihon Medi-Physics Co., Ltd.
    Inventors: Yuji Hashiguchi, Kumiko Iwai, Shigemi Seri, Susumu Kondo, Makoto Azuma
  • Patent number: 5271929
    Abstract: There is disclosed a nuclear magnetic resonance imaging agent comprising a complex compound composed of (a) a dialdehyde-saccharide having a molecular weight of from 500 to 10,000, at least one of the constituent monosaccharides of which is oxidation-cleaved, (b) at least one complexing agent which is chemically coupled to an aldehyde group of the dialdehyde-saccharide and (c) a paramagnetic metal ion which is chemically coupled to the complexing agent.
    Type: Grant
    Filed: July 8, 1992
    Date of Patent: December 21, 1993
    Assignee: Nihon Medi-Physics Co., Ltd.
    Inventors: Yuji Hashiguchi, Kumiko Iwai, Shigemi Seri, Susumu Kondo, Makoto Azuma