Patents by Inventor Suvankar Biswas

Suvankar Biswas has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10637456
    Abstract: A cascaded synchronous bootstrap supply circuit with reduced voltage drop between the cascaded bootstrap capacitors by replacing bootstrap diodes with gallium nitride (GaN) transistors. GaN transistors have a much lower forward voltage drop than diodes, thus providing a cascaded gate driver bootstrap supply circuit with a reduced drop in bootstrap capacitor voltage, which is particularly important as the number of levels increases.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: April 28, 2020
    Assignee: Efficient Power Conversion Corporation
    Inventors: David C. Reusch, Suvankar Biswas, Michael A. de Rooij
  • Patent number: 10243546
    Abstract: A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.
    Type: Grant
    Filed: May 25, 2017
    Date of Patent: March 26, 2019
    Assignee: Efficient Power Conversion Corporation
    Inventors: Michael A. de Rooij, David C. Reusch, Suvankar Biswas
  • Publication number: 20190028094
    Abstract: A cascaded synchronous bootstrap supply circuit with reduced voltage drop between the cascaded bootstrap capacitors by replacing bootstrap diodes with gallium nitride (GaN) transistors. GaN transistors have a much lower forward voltage drop than diodes, thus providing a cascaded gate driver bootstrap supply circuit with a reduced drop in bootstrap capacitor voltage, which is particularly important as the number of levels increases.
    Type: Application
    Filed: July 18, 2018
    Publication date: January 24, 2019
    Inventors: David C. Reusch, Suvankar Biswas, Michael A. de Rooij
  • Patent number: 9997942
    Abstract: In embodiments, apparatuses, methods and systems associated with battery charging are disclosed herein. In various embodiments, a reference current selector may receive a battery voltage sense input and output a reference current level signal, a power point check detector may receive a power supply sense input and output a power point check signal, and a controller coupled to the reference current selector and the power point check detector may receive a battery current sense input and switch a control output based at least in part on the reference current level signal, the battery current sense input, and the power point check signal. Other embodiments may be described and/or claimed.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: June 12, 2018
    Assignee: INTEL CORPORATION
    Inventors: Lilly Huang, Suvankar Biswas, Vaibhav Vaidya, Krishnan Ravichandran
  • Publication number: 20170346475
    Abstract: A fully integrated GaN driver comprising a digital logic signal inverter, a level shifter circuit, a UVLO circuit, an output buffer stage, and (optionally) a FET to be driven, all integrated in a single package. The level shifter circuit converts a ground reference 0-5 V digital signal at the input to a 0-10 V digital signal at the output. The output drive circuitry includes a high side GaN FET that is inverted compared to the low side GaN FET. The inverted high side GaN FET allows switch operation, rather than a source follower topology, thus providing a digital voltage to control the main FET being driven by the circuit.
    Type: Application
    Filed: May 25, 2017
    Publication date: November 30, 2017
    Inventors: Michael A. de Rooij, David C. Reusch, Suvankar Biswas
  • Publication number: 20160181829
    Abstract: In embodiments, apparatuses, methods and systems associated with battery charging are disclosed herein. In various embodiments, a reference current selector may receive a battery voltage sense input and output a reference current level signal, a power point check detector may receive a power supply sense input and output a power point check signal, and a controller coupled to the reference current selector and the power point check detector may receive a battery current sense input and switch a control output based at least in part on the reference current level signal, the battery current sense input, and the power point check signal. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: Lilly Huang, Suvankar Biswas, Vaibhav Vaidya, Krishnan RAVICHANDRAN