Abstract: This disclosure relates to a flank wettable semiconductor device, having: a lead frame including a plurality of leads with a lead end portion and a semiconductor die mounted on the lead frame. The lead end portion comprises a recess portion having a height that corresponds to a thickness of the lead end portion, and a plate member mounted on the leadframe at the lead end portion.

Abstract: This disclosure relates to a flank wettable semiconductor device, having: a lead frame including a plurality of leads with a lead end portion and a semiconductor die mounted on the lead frame. The lead end portion comprises a recess portion having a height that corresponds to a thickness of the lead end portion, and a plate member mounted on the leadframe at the lead end portion.

Abstract: A semiconductor die has internal circuitry formed on two more internal layers, and die bonding pads arranged on a top surface of the die. The bonding pads are connected to the internal circuitry for providing input and output signals to the internal circuitry. One or more connecting lines electrically connect one or more pairs of the die bonding pads, thereby defining a bonding pad layout. The die bonding pads are arranged and connected with the connecting lines such that the bonding pad layout is reversible, which allows the die to be used in different package types (e.g., TSSOP or DFN) yet maintain a standardized pin arrangement without the necessity for long or crossed bond wires.

Abstract: A semiconductor die has internal circuitry formed on two more internal layers, and die bonding pads arranged on a top surface of the die. The bonding pads are connected to the internal circuitry for providing input and output signals to the internal circuitry. One or more connecting lines electrically connect one or more pairs of the die bonding pads, thereby defining a bonding pad layout. The die bonding pads are arranged and connected with the connecting lines such that the bonding pad layout is reversible, which allows the die to be used in different package types (e.g., TSSOP or DFN) yet maintain a standardized pin arrangement without the necessity for long or crossed bond wires.

Abstract: A semiconductor device has wettable corner leads. A semiconductor die is mounted on a lead frame. Die bonding pads are electrically connected to leads of the lead frame. The die and electrical connections are encapsulated with a mold compound. The leads are exposed and flush with the corners of the device. The leads include dimples so that they are wettable, which facilitates inspection when the device is mounted on a circuit board or substrate.

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Abstract: A method of attaching an electronic component to a metal substrate, wherein the electronic component comprises solder provided on an exposed solder region. The method comprising: forming a metal-based compound layer on the substrate; placing the electronic component on the metal substrate such that the solder region is in contact with a contact region of the metal-based compound layer; and heating the solder region such that the contact region of the metal-based compound layer dissolves and the solder region forms an electrical connection between the electronic component and the metal substrate. The metal-based compound layer can have a minimum thickness of 10 nm.

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Abstract: The invention relates to an electronic device (200) for protection against transient voltages in high-power applications. The electronic device (200) comprises: i) a semiconductor substrate (220) comprising an active element (Dd) having at least two terminals (T1, T2); ii) a conductive pad (225) provided on said substrate (220) and being electrically coupled to one of said terminals (T1, T2); iii) electrically-conductive solder material (226) provided on the conductive pad (225); iv) a first conductive part (230) electrically coupled to the conductive pad (225) via the electrically-conductive interconnect material (226). The electronic device further comprises a wall (229) being provided along the periphery of the conductive pad (225) for forming a lateral confinement of the interconnect material (226) on the conductive pad (225). The invention further relates to a method of manufacturing such electronic device.

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a semiconductor die (110) having a first surface and a second surface opposite said first surface carrying a contact (112); a conductive body (120) on said contact; an encapsulation material (130) laterally encapsulating said conductive body; and a capping member (140, 610) such as a solder cap, a further semiconductor die or a combination thereof in conductive contact with the solder portion, said solder cap extending over the encapsulation material. A further solder cap (150) may be provided over the first surface. A method of manufacturing such a discrete semiconductor device package is also disclosed.

Abstract: Aspects of the present invention are directed to circuits, circuit packages and related methods. In accordance with various example embodiments, respective electrodes are implemented to facilitate contact to a semiconductor device via different surfaces and/or sidewalls, as may be useful in connecting the device to an external package having a plurality of semiconductor devices in which same-surface connections to the devices are spatially restricted. The semiconductor device has opposing surfaces and sidewalls connecting the surfaces, and contacts to respective different regions in the device. Respective electrodes are coupled to the respective contacts and extend along/around the device to provide access to the contacts via different surfaces.

Abstract: Aspects of the present invention are directed to circuits, circuit packages and related methods. In accordance with various example embodiments, respective electrodes are implemented to facilitate contact to a semiconductor device via different surfaces and/or sidewalls, as may be useful in connecting the device to an external package having a plurality of semiconductor devices in which same-surface connections to the devices are spatially restricted. The semiconductor device has opposing surfaces and sidewalls connecting the surfaces, and contacts to respective different regions in the device. Respective electrodes are coupled to the respective contacts and extend along/around the device to provide access to the contacts via different surfaces.

Abstract: In one embodiment, a method is provided for packaging a semiconductor die. A leadframe having a die-pad and one or more lead-pads is placed (502) on an assembly surface. The die-pad has a base portion (202) resting on the assembly surface, an upper portion (204) on the base portion extending laterally from the base portion, and a support arm (208) extending from and supporting the upper portion of die-pad. A semiconductor die (206) is wirebonded (504) to a top surface of the upper portion of the die-pad. The semiconductor die is wirebonded (506) to the one or more lead-pads (210). The semiconductor die and leadframe are encased (508) in a package material (802). The package material fills a space between the upper portion of the die-pad and the assembly surface. A portion of the support arm located in a cutting lane is removed (512).

Abstract: Disclosed is a discrete semiconductor device package (100) comprising a leadframe portion (10) comprising a recess (14) having a depth substantially equal to the thickness of the discrete semiconductor device (20), wherein a raised portion of the leadframe portion adjacent to said recess defines a first contact area (12); a discrete semiconductor device (20) in said recess, wherein the exposed surface (22) of the discrete semiconductor device defines a second contact area; a protective layer (30) covering the leadframe portion and the a discrete semiconductor device but not the first contact area and the second contact area; and respective plating layers (40) covering the first contact area and the second contact area. A method of manufacturing such a package and a carrier comprising such a package are also disclosed.

Abstract: Disclosed is a method of manufacturing a discrete semiconductor device package (100), comprising providing a wafer comprising a plurality of semiconductor devices (50), each of said semiconductor devices comprising a substrate (110) having a top contact (130) and a bottom contact (150); partially sawing said wafer with a first sawing blade such that the semiconductor devices are partially separated from each other by respective incisions (20); lining said incisions with an electrically insulating film (160); and sawing through said incisions with a second sawing blade such that the semiconductor devices are fully separated from each other. A resulting discrete semiconductor device package (100) and a carrier (200) comprising such a discrete semiconductor device package (100) are also disclosed.

Abstract: The invention relates to an optoelectronic device with a module comprising a holder with an amplifier and on either side thereof a lens and a glass fiber which can be aligned relative to the amplifier. The module also comprises two monitor diodes. A disadvantage of the known device is that the lenses cannot be easily aligned relative to the amplifier, and the monitor diodes cannot be easily connected electrically. The use of a spherical lenses also poses a problem. In a device according to the invention, the monitor diodes are so positioned that they are capable of detecting radiation reflected at the outside of the lenses instead of radiation refracted and reflected within the lenses, while the radiation-sensitive surfaces of the monitor diodes are positioned such that they receive more radiation from one lens than from the other lens.