Patents by Inventor Swee Cheng Ho

Swee Cheng Ho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7208967
    Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: April 24, 2007
    Assignee: Intel Corporation
    Inventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan
  • Patent number: 7129729
    Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: October 31, 2006
    Assignee: Intel Corporation
    Inventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan
  • Patent number: 6956387
    Abstract: Test modules, systems, and methods employing capacitors for the testing of the solder joint connections between a printed circuit board (PCB) and a socket of a device are presented in embodiments of the current invention. A test module having capacitors in parallel, and in particular embedded capacitors, can be used to test tied traces and their solder joint connections by measuring the total capacitance of the capacitors. Embodiments of the current invention present no-power tests that can be used with a variety of testing platforms and test fixtures, such as in-circuit testing (ICT) and manufacturing defect analysis (MDA.) Additionally, the test module can be used with a variety of sockets, such as a ball grid array, a pinned grid array, and a land grid array.
    Type: Grant
    Filed: August 15, 2003
    Date of Patent: October 18, 2005
    Assignee: Intel Corporation
    Inventors: Swee Cheng Ho, Teik Sean Toh, Tzyy Haw Tan