Patents by Inventor Swee Kian Cheng

Swee Kian Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Solder printing process to reduce void formation in a microvia
    Patent number: 7789285
    Abstract: In one embodiment, a method is provided. The method comprises filling a microvia formed in a bond pad with solder paste comprising solder balls of the first size; and coating the bond pad with solder paste comprising solder balls of the second size, wherein the second size is greater than the first size.
    Type: Grant
    Filed: October 17, 2007
    Date of Patent: September 7, 2010
    Assignee: Intel Corporation
    Inventors: Cheng Siew Tay, Pek Chew Tan, Swee Kian Cheng, Eng Hooi Yap
  • Method and apparatus for reducing electrical interconnection fatigue
    Patent number: 7642660
    Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.
    Type: Grant
    Filed: December 26, 2006
    Date of Patent: January 5, 2010
    Inventors: Cheng Siew Tay, Swee Kian Cheng, Eng Huat Goh
  • Solder printing process to reduce void formation in a microvia
    Patent number: 7331503
    Abstract: In one embodiment, a method is provided. The method comprises filling a microvia formed in a bond pad with solder paste comprising solder balls of the first size; and coating the bond pad with solder paste comprising solder balls of the second size, wherein the second size is greater than the first size.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Cheng Siew Tay, Pek Chew Tan, Swee Kian Cheng, Eng Hooi Yap
  • Method and apparatus for reducing electrical interconnection fatigue
    Patent number: 7173342
    Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.
    Type: Grant
    Filed: December 17, 2002
    Date of Patent: February 6, 2007
    Assignee: Intel Corporation
    Inventors: Cheng Siew Tay, Swee Kian Cheng, Eng Huat Goh
  • Method and apparatus for reducing electrical interconnection fatigue
    Publication number: 20040113285
    Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.
    Type: Application
    Filed: December 17, 2002
    Publication date: June 17, 2004
    Inventors: Cheng Siew Tay, Swee Kian Cheng, Eng Huat Goh