Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

Abstract: A capacitor having a capacitance settable by biasing, including: a series association of a plurality of first capacitive elements between two first terminals defining the capacitor electrodes; and two second terminals of application of bias voltages respectively connected, via resistive elements, to the opposite electrodes of each of the first capacitive elements.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A first capacitor has a capacitance adjustable to a set point value by application of a bias voltage. A second capacitor also has a capacitance adjustable to a set point value by application of a bias voltage. The first and second capacitors are arranged to receive the same bias voltage generated by a control circuit. The control circuit receiving the set point value as an input and generates that bias voltage in response to a quantity representative of a capacitance of the second capacitor.

Abstract: A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

Abstract: A first capacitor has a capacitance adjustable to a set point value by application of a bias voltage. A second capacitor also has a capacitance adjustable to a set point value by application of a bias voltage. The first and second capacitors are arranged to receive the same bias voltage generated by a control circuit. The control circuit receiving the set point value as an input and generates that bias voltage in response to a quantity representative of a capacitance of the second capacitor.

Abstract: A capacitor has a variable capacitance settable by a bias voltage. A method for setting the bias voltage including the steps of: (a) injecting a constant current to bias the capacitor; (b) measuring the capacitor voltage at the end of a time interval; (c) calculating the capacitance value obtained at the end of the time interval; (d) comparing this value with a desired value; and (e) repeating steps (a) to (d) so as long as the calculated value is different from the set point value. When calculated value matches the set point value; the measured capacitor voltage is stored as a bias voltage to be applied to the capacitor for setting the variable capacitance.

Abstract: A circuit for controlling a capacitor having a capacitance settable by biasing, including at least one terminal for receiving a digital set point value depending on the value desired for the capacitance, a circuit for determining a drift of the capacitance with respect to a nominal value, and a circuit of application of a correction to said digital set point value, depending on the determined drift.

Abstract: A capacitor having a capacitance settable by biasing, including: a series association of a plurality of first capacitive elements between two first terminals defining the capacitor electrodes; and two second terminals of application of bias voltages respectively connected, via resistive elements, to the opposite electrodes of each of the first capacitive elements.

Abstract: A circuit for controlling a capacitor having a capacitance settable by biasing, including at least one terminal for receiving a digital set point value depending on the value desired for the capacitance, a circuit for determining a drift of the capacitance with respect to a nominal value, and a circuit of application of a correction to said digital set point value, depending on the determined drift.

Abstract: A circuit for controlling a capacitor having a capacitance adjustable by biasing, including an amplifier for delivering a D.C. bias voltage, having a feedback slowed down by a resistive and capacitive cell.

Abstract: A directional dual distributed coupler including: a first conductive line between first and second ports, intended to convey a signal to be transmitted in a first frequency band; a second conductive line coupled to the first one; a third conductive line between third and fourth ports, intended to convey a signal to be transmitted in a greater frequency band than the first one; a fourth conductive line coupled to the third one; and at least one diplexer connecting, on the side of the second and fourth ports, the respective ends of the second and fourth lines to a fifth port.

Abstract: A distributed-line directional coupler including: a first conductive line between first and second ports intended to convey a signal to be transmitted; and a second conductive line, coupled to the first one, between third and fourth ports, the second line being interrupted approximately at its middle, the two intermediary ends being connected to attenuators.

Abstract: A method and a device for determining the amplitude and the phase of an impedance connected on a transmission line, including a bidirectional coupler having a first line interposed on the transmission line and having a second line providing at its respective ends two measurement signals, and a balun having its respective differential-mode inputs receiving data representative of the measurement signals.

Abstract: A distributed-line directional coupler including: a first conductive line between first and second ports intended to convey a signal to be transmitted; and a second conductive line, coupled to the first one, between third and fourth ports, the second line being interrupted approximately at its middle, the two intermediary ends being connected to attenuators.