Patents by Inventor Sylvie Bruyere

Sylvie Bruyere has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Creation of capacitors equipped with means to reduce the stresses in the metal material of their lower structures
    Patent number: 7916449
    Abstract: The method for forming the microelectronic device having at least one two or three dimensional capacitor includes creating, on a substrate, a plurality of components and a number of superimposed metal interconnection levels. An insulating layer is formed above a metal interconnection level, and a horizontal metal zone of a next metal interconnection level in which one or more of the insulating blocks created from this insulating layer are incorporated is formed therein. The zone is designed to form a lower structural part of the capacitor.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: March 29, 2011
    Assignee: STMicroelectronics SA
    Inventors: Sébastien Cremer, Philippe Delpech, Sylvie Bruyere
  • CREATION OF CAPACITORS EQUIPPED WITH MEANS TO REDUCE THE STRESSES IN THE METAL MATERIAL OF THEIR LOWER STRUCTURES
    Publication number: 20090040684
    Abstract: The method for forming the microelectronic device having at least one two or three dimensional capacitor includes creating, on a substrate, a plurality of components and a number of superimposed metal interconnection levels. An insulating layer is formed above a metal interconnection level, and a horizontal metal zone of a next metal interconnection level in which one or more of the insulating blocks created from this insulating layer are incorporated is formed therein. The zone is designed to form a lower structural part of the capacitor.
    Type: Application
    Filed: June 6, 2008
    Publication date: February 12, 2009
    Applicant: STMicroelectronics SA
    Inventors: Sebastien Cremer, Philippe Delpech, Sylvie Bruyere
  • Nonvolatile SRAM memory cell
    Patent number: 7184299
    Abstract: An SRAM memory cell includes first and second inverters (14, 16) interconnected between first and second data nodes. Each inverter is formed from complementary MOS transistors (18, 20, 18?, 20?) connected in series between a DC voltage supply source and a grounding circuit (22). A circuit (28, 30) programs the MOS transistors by causing an irreversible degradation of a gate oxide layer of at least some of the transistors (18, 18?).
    Type: Grant
    Filed: December 2, 2003
    Date of Patent: February 27, 2007
    Assignee: STMicroelectronics S.A.
    Inventors: Richard Fournel, Emmanuel Vincent, Sylvie Bruyere, Philippe Candelier, Francois Jacquet
  • Nonvolatile SRAM memory cell
    Publication number: 20040252554
    Abstract: An SRAM memory cell includes first and second inverters (14, 16) interconnected between first and second data nodes. Each inverter is formed from complementary MOS transistors (18, 20, 18′, 20′) connected in series between a DC voltage supply source and a grounding circuit (22). A circuit (28, 30) programs the MOS transistors by causing an irreversible degradation of a gate oxide layer of at least some of the transistors (18, 18′).
    Type: Application
    Filed: December 2, 2003
    Publication date: December 16, 2004
    Applicant: STMicroelectronics S.A.
    Inventors: Richard Fournel, Emmanuel Vincent, Sylvie Bruyere, Philippe Candelier, Francois Jacquet