Patents by Inventor Sylvie M. Mignot

Sylvie M. Mignot has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Via formation using sidewall image transfer process to define lateral dimension
    Patent number: 10157789
    Abstract: A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: December 18, 2018
    Assignees: International Business Machines Corporation, GLOBALFOUNDRIES, INC., STMicroelectronics, Inc.
    Inventors: Shyng-Tsong Chen, Cheng Chi, Chi-Chun Liu, Sylvie M. Mignot, Yann A. Mignot, Hosadurga K. Shobha, Terry A. Spooner, Wenhui Wang, Yongan Xu
  • VIA FORMATION USING SIDEWALL IMAGE TRANFER PROCESS TO DEFINE LATERAL DIMENSION
    Publication number: 20160358820
    Abstract: A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.
    Type: Application
    Filed: August 17, 2016
    Publication date: December 8, 2016
    Inventors: Shyng-Tsong Chen, Cheng Chi, Chi-Chun Liu, Sylvie M. Mignot, Yann A. Mignot, Hosadurga K. Shobha, Terry A. Spooner, Wenhui Wang, Yongan Xu
  • VIA FORMATION USING SIDEWALL IMAGE TRANSFER PROCESS TO DEFINE LATERAL DIMENSION
    Publication number: 20160336225
    Abstract: A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.
    Type: Application
    Filed: May 13, 2015
    Publication date: November 17, 2016
    Inventors: Shyng-Tsong Chen, Cheng Chi, Chi-Chun Liu, Sylvie M. Mignot, Yann A. Mignot, Hosadurga K. Shobha, Terry A. Spooner, Wenhui Wang, Yongan Xu
  • Via formation using sidewall image transfer process to define lateral dimension
    Patent number: 9490168
    Abstract: A method of forming a via to an underlying layer of a semiconductor device is provided. The method may include forming a pillar over the underlying layer using a sidewall image transfer process. A dielectric layer is formed over the pillar and the underlying layer; and a via mask patterned over the dielectric layer, the via mask having a mask opening at least partially overlapping the pillar. A via opening is etched in the dielectric layer using the via mask, the mask opening defining a first lateral dimension of the via opening in a first direction and the pillar defining a second lateral dimension of the via opening in a second direction different than the first direction. The via opening is filled with a conductor to form the via. A semiconductor device and via structure are also provided.
    Type: Grant
    Filed: May 13, 2015
    Date of Patent: November 8, 2016
    Assignees: International Business Machines Corporation, GlobalFoundries, Inc., STMicroelectronics, Inc.
    Inventors: Shyng-Tsong Chen, Cheng Chi, Chi-Chun Liu, Sylvie M. Mignot, Yann A. Mignot, Hosadurga K. Shobha, Terry A. Spooner, Wenhui Wang, Yongan Xu