Patents by Inventor Syouji Higashida

Syouji Higashida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7112828
    Abstract: A semiconductor device that permits an increase in static destruction resistance while preventing an increase in the chip size includes a protective element formed by a polysilicon layer in which JFETs are serially connected in three stages and which is inserted between a gate electrode and source electrode of a power-MOSFET or IGBT semiconductor device. The gate insulation film of a semiconductor active element portion of the semiconductor device is protected regardless of whether the polarity of static electricity or another high voltage is positive or negative.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: September 26, 2006
    Assignee: Rohm Co., Ltd.
    Inventor: Syouji Higashida
  • Patent number: 6965150
    Abstract: A plurality of transistor cells (T) are arranged in the semiconductor layer (4). Ring-shaped p-type layers (1b) and n-type layers (1a) composed of polysilicon film are formed alternately on an insulating layer (6) in an outer side than the plurality of transistor cells (T) (the peripheral portion of chip), thereby forming a protective diode (1). The most outer layer of the protective diode (1) is contacted to the gate wiring (2) composed of metal film such as Al, which is formed circularly on the most external layer, and the most inner layer is contacted to the source wiring composed of metal layer, thereby the protective diode is connected between the gate and source of a transistor. As a result of this, the semiconductor device with the protective diode which has the small series resistance, can be formed without enlarging chip area and by using unoccupied space of chip, and realize protection function sufficiently, can be obtained.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: November 15, 2005
    Assignee: Rohm Co., Ltd.
    Inventors: Syouji Higashida, Masaru Takaishi
  • Publication number: 20050067632
    Abstract: A semiconductor device that permits an increase in static destruction resistance while preventing an increase in the chip size includes a protective element formed by a polysilicon layer in which JFETs are serially connected in three stages and which is inserted between a gate electrode and source electrode of a power-MOSFET or IGBT semiconductor device. The gate insulation film of a semiconductor active element portion of the semiconductor device is protected regardless of whether the polarity of static electricity or another high voltage is positive or negative.
    Type: Application
    Filed: September 24, 2004
    Publication date: March 31, 2005
    Applicant: Rohm Company, Ltd.
    Inventor: Syouji Higashida
  • Publication number: 20030057497
    Abstract: A plurality of transistor cells (T) are arranged in the semiconductor layer (4). Ring-shaped p-type layers (1b) and n-type layers (1a) composed of polysilicon film are formed alternately on an insulating layer (6) in an outer side than the plurality of transistor cells (T) (the peripheral portion of chip), thereby forming a protective diode (1). The most outer layer of the protective diode (1) is contacted to the gate wiring (2) composed of metal film such as Al, which is formed circularly on the most external layer, and the most inner layer is contacted to the source wiring composed of metal layer, thereby the protective diode is connected between the gate and source of a transistor. As a result of this, the semiconductor device with the protective diode which has the small series resistance, can be formed without enlarging chip area and by using unoccupied space of chip, and realize protection function sufficiently, can be obtained.
    Type: Application
    Filed: November 6, 2001
    Publication date: March 27, 2003
    Inventors: Syouji Higashida, Masaru Takaishi
  • Patent number: 5726472
    Abstract: A semiconductor device having a power MOSFET. The power MOSFET has a plurality of FET cells formed over a semiconductor substrate, has gate electrodes of the respective FET cells connected to one another, and has a gate electrode pad, for connection to an external terminal, formed over the semiconductor substrate through an insulating film. The gate electrode pad is arranged so as to extend over the FET cells through an insulating film.
    Type: Grant
    Filed: March 26, 1996
    Date of Patent: March 10, 1998
    Assignee: Rohm Co., Ltd.
    Inventor: Syouji Higashida