Abstract: An inhibitor switch is disclosed, including a permanent magnet and a magnetic sensor which detects a magnetic force of the permanent magnet in a non-contacting state and outputs a linear change in a voltage value in response to a change in a relative position between the permanent magnet and the magnetic sensor. One of the permanent magnet and the magnetic sensor is mounted on a manual valve shaft side for changing over change gear range positions of an automatic transmission by operating a manual valve of the automatic transmission in an interlocking manner with the manual valve shaft. The other one of the permanent magnet and the magnetic sensor is mounted on a transmission case side of the automatic transmission. The change gear range position of the automatic transmission is detectable in response to an output of the voltage value corresponding to the change gear range position.

Abstract: Change gear range positions of an automatic transmission are accurately detected, to perform a sophisticated control and to miniaturize the automatic transmission.

Abstract: A liquid crystal display device comprises a first substrate on which a plurality of thin-film transistors, a plurality of pixel electrodes respectively connected to the thin-film transistors, a plurality of gate lines for connecting gate electrodes of the thin-film transistors, and a plurality of drain lines for connecting drain electrodes of the thin-film transistors are arranged in a matrix pattern, a second substrate on which a plurality of divisional common electrodes which face the plurality of pixel electrodes are formed, and a liquid crystal material encapsulated by the first and second substrates and a sealing member, and interposed between the plurality of pixel electrodes and the plurality of divisional common electrodes. The matrix pattern on the first substrate is formed by a photolithograpy process comprising a step of divisionally exposing photoresist in a plurality of divisional regions by using a stepper.

Abstract: A thin-film transistor comprises a gate electrode formed on an insulating substrate, a gate insulating film covering the gate electrode and the insulating substrate, an i-type semiconductor layer formed on the gate insulating film, and a source electrode and a drain electrode electrically connected to two ends of the i-type semiconductor layer, respectively. The gate electrode is made of aluminum alloy containing high-melting-point metal such as Ti and Ta and oxygen or nitrogen or both.

Abstract: A TFT array has a plurality of gate lines and a plurality of drain lines formed on a transparent insulating substrate. The gate lines intersect with the drain lines. TFTs are formed at the intersections of the gate lines and the drain lines. An opaque film is formed above the gate lines, the drain lines, and the TFTs, allowing no passage of light passing through the gaps between the transparent electrode, on the one hand, and the gate and drain lines, on the other hand. Therefore, when the TFT array is incorporated into a liquid-crystal display, the display will display high-contrast images.

Abstract: Method of forming a thin film consisting of a silicon-based material includes a first step of setting a substrate subjected to formation of a thin insulating film consisting of the silicon-based material in a chamber having high-frequency electrodes for receiving a high-frequency power while the substrate is kept heated at a predetermined temperature, a second step of supplying a process gas to the chamber, a third step of applying a high-frequency power to the high-frequency electrodes to generate a plasma, a fourth step of depositing an insulator consisting of the silicon-based material on the substrate to a predetermined thickness while gas supply in the second step and supply of the high-frequency power in the third step are kept maintained, and a fifth step of cooling the substrate on which the insulating film is formed and unloading the substrate from the chamber. In the fourth step, the substrate is kept heated within the temperature range of 230.degree. C. to 270.degree. C.

Abstract: A memory cell has a thin film memory transistor and a thin film selective transistor. The thin film memory transistor has a charge trapping structure and a positive-negative-charge occurrence structure. The charge trapping structure includes a first thin film semiconductor layer, an insulating memory gate layer formed on the first thin film semiconductor layer, and a memory gate electrode. The positive-negative-charge occurrence structure includes an impurity high density layer with a portion facing the memory gate electrode. The thin film selective transistor is coupled to the thin film memory transistor in a serial form and has an only n-channel occurrence structure which includes a second thin film semiconductor layer, an insulating selective gate layer formed on the second thin film semiconductor layer and being thicker than the insulating memory gate layer, and a selective gate electrode formed on said insulating selective gate layer.

Abstract: A thin-film transistor comprises a gate electrode formed on a glass substrate, a gate insulating film formed essentially over an entire surface of the substrate to cover the gate electrode, a non-single-crystal silicon semiconductor film placed on the gate insulating film to cover the gate electrode; and a drain electrode and a source electrode spaced a specified distance apart on the semiconductor film and electrically connected to the semiconductor film so as to form the channel region of the transistor. The gate electrode is made of titanium-containing aluminum.

Abstract: A TFT is formed on a transparent insulative substrate, and includes a gate electrode, a gate insulating film, a semiconductor film which has a channel portion, source and drain electrodes. An insulating film is formed on the TFT so as to cover at least the drain electrode and the gate insulating film. A transparent electrode is formed on at least part of insulating film except for a portion above the channel portion on the semiconductor film. The transparent electrode is electrically connected to the source electrode via a through hole which is formed on the insulating film at a position of the source electrode.

Abstract: First, a gate metal layer, a gate insulating film, a semiconductor layer, an n-type semiconductor layer, and an ohmic metal layer formed on a substrate in the order mentioned. Then, the film and the layers are patterned into those having the same shape and size. Next, a source metal layer and a drain metal layer are formed on the ohmic metal layer. Further, a portion of the ohmic metal layer, a portion of said source metal layer, and a portion of said drain metal layer are etched, thereby forming a channel portion. Finally, a transparent electrode is formed on the source metal layer, thus manufacturing a TFT. Since the film and the layer, the major components of the TFT, are sequentially formed, and are patterned simultaneously, the TFT can be manufacture with high yield. Further, since the transparent electrode is formed on the uppermost layer, i.e., the source metal layer, the pixel has a great opening ratio.

Abstract: A thin film transistor panel has a substrate on which a plurality of electrode lines are aligned in a matrix form, thin film transistors which are formed on crossing portions of the plurality of the electrode lines, a diffusible insulating film for covering said thin film transistors, and metal-diffused layers and are connected to source electrodes. The metal-diffused layers are formed by diffusing a metal into predetermined areas of said insulating film. If the metal-diffused layers are used as the pixel electrodes, high density display can be obtained due to the fine pixel electrodes.

Abstract: A thin film transistor comprising a gate electrode, a gate insulating film, and a semiconductor layer, which have the same shape and the same size and stacked one upon another. The transistor further comprises an n-type semiconductor layer formed on the semiconductor layer, an ohmic electrode formed on the n-type semiconductor layer, and a source electrode and a drain electrode both formed on the ohmic electrode. Further, a transparent electrode is electrically connected to the source electrode. The thin film transistor has no step portions. Therefore, the transistor can be manufactured with high yield, and forms a pixel having a high opening ratio.

Abstract: A TFT of the present invention includes a transparent insulative substrate, a gate electrode formed on the substrate, a gate insulating film formed on at least the gate electrode, a semiconductor film formed at a position on the gate insulating film corresponding to the gate electrode, source and drain electrodes arranged on the semiconductor film so as to form a channel portion, a transparent insulating film covering the source and drain electrodes and the semiconductor film, and a transparent electrode connected to the source electrode. A through hole is formed in the transparent insulating film above the source electrode. The transparent electrode is formed on a portion of the transparent insulating film except for a portion above the channel portion on the semiconductor film.

Abstract: A TFT array having a plurality of gate lines and a plurality of drain lines formed on a transparent substrate. The gate lines intersect with the drain lines. TFT are formed at the intersections of the gate lines and the drain lines. An insulating film is formed on the drain lines and the drain electrodes of the TFTs. Pixel electrodes are formed, each overlapping the corresponding gate line and the corresponding drain line. The pixel electrode has a large area and thus, have a high opening ratio. The TFT array can, therefore, help to provide a liquid crystal display having high contrast.