Abstract: A touch sensor panel can include a silver nanowire touch electrodes formed in a silver nanowire layer on the substrate. In some examples, the touch sensor panel can include one or more anticorrosion layers to protect silver nanowire layer from ionization. In some examples, the silver nanowires include electrochemically stable outer shells that protect the silver nanowires from ionization. Additionally or alternatively, the touch sensor panel can including one or more anti-static layers to protect against electrostatic discharge (ESD). Additionally or alternatively, one or more anticorrosion layers and/or one or more antistatic layers can be formed with a passivation layer therebetween. The passivation layer, one or more anticorrosion layers and/or one or more antistatic layers can then be laminated to the silver nanowire layer to prevent corrosion and/or ESD events in the silver nanowire layer during the fabrication of the touch sensor panel.

Abstract: A touch sensor panel is disclosed. The touch sensor panel can include a first substrate layer; a first electrode layer comprising one or more of a touch electrode and a trace configured to couple the touch electrode to sense circuitry, the first electrode layer located on a first side of the first substrate layer; a second electrode layer located on the first side of the first substrate layer; a passivation layer disposed in between the first electrode layer and the second electrode layer; and a third electrode layer located on a second side of the first substrate layer, different from the first side of the first substrate layer. The first electrode layer can be comprised of a first conductive material, the second electrode layer can be comprised of a second conductive material, and the third electrode layer can be comprised of a third conductive material. The touch sensor panel may not include a second substrate layer between the first substrate layer and the second electrode layer.

Abstract: A touch sensor panel is disclosed. The touch sensor panel can include a first substrate layer; a first electrode layer comprising one or more of a touch electrode and a trace configured to couple the touch electrode to sense circuitry, the first electrode layer located on a first side of the first substrate layer; a second electrode layer located on the first side of the first substrate layer; a passivation layer disposed in between the first electrode layer and the second electrode layer; and a third electrode layer located on a second side of the first substrate layer, different from the first side of the first substrate layer. The first electrode layer can be comprised of a first conductive material, the second electrode layer can be comprised of a second conductive material, and the third electrode layer can be comprised of a third conductive material. The touch sensor panel may not include a second substrate layer between the first substrate layer and the second electrode layer.

Abstract: A touch sensor panel is disclosed. The touch sensor panel can include a first substrate layer; a first electrode layer comprising one or more of a touch electrode and a trace configured to couple the touch electrode to sense circuitry, the first electrode layer located on a first side of the first substrate layer; a second electrode layer located on the first side of the first substrate layer; a passivation layer disposed in between the first electrode layer and the second electrode layer; and a third electrode layer located on a second side of the first substrate layer, different from the first side of the first substrate layer. The first electrode layer can be comprised of a first conductive material, the second electrode layer can be comprised of a second conductive material, and the third electrode layer can be comprised of a third conductive material. The touch sensor panel may not include a second substrate layer between the first substrate layer and the second electrode layer.

Abstract: A touch sensor panel is disclosed. The touch sensor panel can include a first substrate layer; a first electrode layer comprising one or more of a touch electrode and a trace configured to couple the touch electrode to sense circuitry, the first electrode layer located on a first side of the first substrate layer; a second electrode layer located on the first side of the first substrate layer; a passivation layer disposed in between the first electrode layer and the second electrode layer; and a third electrode layer located on a second side of the first substrate layer, different from the first side of the first substrate layer. The first electrode layer can be comprised of a first conductive material, the second electrode layer can be comprised of a second conductive material, and the third electrode layer can be comprised of a third conductive material. The touch sensor panel may not include a second substrate layer between the first substrate layer and the second electrode layer.

Abstract: A gate line driving module used on a liquid crystal display uses clock signal sources in replacement of a high level gate power source, such that the phenomenon of device characteristic drift occurring in the foregoing related art is avoided. The gate line driving module includes a plurality of odd-pixel gate line driving circuits, a plurality of even-pixel gate line driving circuits, and an auxiliary gate line driving circuit. A pair of neighboring odd-pixel gate line driving circuit and even-pixel gate line driving circuit exchange output signals thereof with each other in a forward or feedback manner for ensuring that each the odd-pixel gate line driving circuit and each the even-pixel gate line driving circuit are driven once. The auxiliary gate line driving circuit is used for ensuring that signal iteration of the gate line driving module is under normal operation.

Abstract: The disclosure provides a compensating design method for a shadow mask including: providing a first shadow mask having a first opening pattern and a first material pattern; disposing the first shadow mask on a substrate having a predetermined depositing film area with first and second sides; performing a deposition process by using the first shadow mask as a mask to form a film on an actual depositing film area, wherein the distance between the first and the third sides is a first bias, and the distance between the second and the fourth sides is a second bias, and a single side gray zone of the actual depositing film area relative to the predetermined depositing film area is substantially half of the sum of the first and the second biases; and designing a second shadow mask according to the single side gray zone.

Abstract: A method for improving motion blur and contour shadow of a display displaying images having a number of frames includes transforming a second average gray scale into a third average gray scale when a first average gray scale for displaying a first frame is unequal to the second average gray scale for displaying a second frame. A luminance corresponding to the second frame is generated according to the third average gray scale and at least one luminance query table. The third average gray scale is greater than the first average gray scale and the second average gray scale or less than the first average gray scale and the second average gray scale.

Abstract: An exemplary shift register includes plural shift register units (S1˜Sn). All the shift register units receive either a first clock signal or a second clock signal, and the shift register units output a plurality of shift register signals in sequence. An output of a previous shift register unit is an input of the next adjacent shift register unit.

Abstract: A liquid crystal display (LCD) device includes an LCD panel, and a common voltage generating circuit configured for providing common voltages to the LCD panel. The common voltage generating circuit includes a microprocessor, a timer, a voltage adjustment circuit, and a look up table. The microprocessor is electrically connected to the timer, the look up table, and the voltage adjustment circuit. The timer is configured for recording a continuous operated time of the LCD panel. The look up table is configured for storing optimal common voltages corresponding to each continuous operated time. The microprocessor is configured for reading the optimal common voltage at set intervals corresponding to the continuous operated time, and controlling the voltage adjustment circuit to provide the corresponding optimal common voltage to the LCD panel.

Abstract: The present invention relates to a shift register and a liquid crystal display using the same. The liquid crystal display includes a liquid crystal panel, a data driving circuit and a scanning driving circuit. The data driving circuit and the scanning driving circuit each include a shift register. The shift register includes a plurality of shift register units. Two adjacent shift register units respectively receive two inverse clock signals and a VGL signal. Each shift register unit includes a signal output circuit, a signal input circuit, a first logic converting circuit, and a second logic converting circuit. The present shift register and a liquid crystal display have simple structure.

Abstract: An exemplary shift register includes a plurality of shift register units, each of which includes an output circuit, an input circuit, and a logic circuit. The output circuit includes a clock transistor, a voltage stabilizing transistor, and an input circuit for receiving signals output by a previous shift register unit. The logic circuit receives signals output by the input circuit. When the input circuit outputs signals to switch on the clock transistor, the logic circuit outputs a low level voltage signal to shut off the voltage stabilizing transistor. Thus, the output circuit outputs signals via the clock circuit. On the other hand, when the input circuit outputs signals to shut off the clock transistor, the logic circuit outputs a high level voltage signal to turn on the voltage stabilizing transistor, so as to maintain the output circuit to output low level voltage signal.

Abstract: A shift register of the present disclosure comprises a plurality of shift register units using alternating clock signals to shift signals. The shift register outputs signals having substantially no overlap with adjacent signals. The shift register may be employed in a liquid crystal display.

Abstract: An exemplary LCD includes a frame memory configured for receiving a plurality of first gradations of current frame and outputting a plurality of second gradations of preceding frame pre-stored therein; a comparator configured for receiving, comparing the first gradations with the second gradation to generate a comparison result; a luminance detector configured for detecting a luminance degree of each of pixel according to the gradations of current frame; a calculator configured for calculating a complication degree of a picture to be displayed in current frame; and a gradation processor configured for receiving the first gradations of current frame to be displayed on the LCD panel, generating a plurality of pairs of compensating gradations according to the gradation of each pixel, and selecting one pair of the compensating gradations to be outputted to the LCD panel according to a received comparison result, a received luminance degree, and a received complication degree.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a high level signal input terminal (VH), a low level signal input terminal (VL), an output terminal (VOUT), a reverse output terminal (VOUTB), a first input terminal (VIN1), a second input terminal (VIN2), a first common node (P1), a second common node (P2), a first switch circuit (31), a second switch circuit (32), a third switch circuit (33), a fourth switch circuit (34), a fifth switch circuit (35), a six switch circuit (36), a first inverter (37) connected between the first common node and the second common node, and a second inverter (39) connected between the output terminal and the reverse output terminal.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a clock signal input terminal (TS), a high level signal input terminal (VH), a low level signal input terminal (VL), an input terminal (VIN), a first output terminal (VOUT1), a second output terminal (VOUT2), a first common node (P1), a second common node (P2), a first switch circuit (31), a second switch circuit (32), a third switch circuit (33), a fourth switch circuit (34), a fifth switch circuit (35), a six switch circuit (36), a nor gate, an inverter, and an and gate.

Abstract: An exemplary liquid crystal display (300) includes a liquid crystal panel (301), a data circuit (303), and a black insertion controller (305). The liquid crystal panel includes a plurality of pixels (330). The black insertion controller receives a display signal of the pixel, and generates a black insertion control signal according to an address of the pixel, and the data circuit drives the pixel to display one of a black image unit and a normal image unit according to the black insertion control signal in a first sub-frame period of a frame period. The displayed black image unit of the pixel or the displayed normal image unit is converted into a normal image unit or a black image unit in a second sub-frame period of the frame period. A method for driving the liquid crystal display is also provided.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200) connected one by one. Each of the shift register units includes a first switch unit (201), a second switch unit (202), a third switch unit (203), a fourth switch unit (204), and a fifth switch unit (205). A signal input terminal of each shift register unit is coupled to an output terminal of a rear-stage shift register unit. A first clock input terminal receives a first clock signal to turn on/off the first and second switch units. The third switch unit receives a second clock signal. The fourth switch unit pulls up the output voltage of the output terminal according to a controlling signal from the first switch unit. The fifth switch unit pulls down the output voltage of the output terminal according to controlling signals from the second and third switch units.

Abstract: An exemplary shift register (20) includes shift register units (S1˜Sn). The shift register units receive a clock signal and an inverse clock signal and output a plurality of shift register signals in sequence. An output of previous adjacent one of the shift register units is an input of the shift register unit.

Abstract: An exemplary shift register (20) includes a plurality of shift register units (200). The shift register units receive a clock signal and an inverse clock signal and output a plurality of shift register signals in sequence. The outputs waveforms of pre-stage shift register unit and the rear-stage shift register unit have no overlapping signals.