Patents by Inventor T. J. Tseng

T. J. Tseng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6175497
    Abstract: A thermal vias-provided cavity-down IC package structure of the invention is provided. The thermal vias-provided cavity-down IC package structure includes a substrate, a heat sink and an adhesive layer for attaching the substrate to the heat sink. The substrate is formed of multiple layers of printed circuit boards which are attached to each other, and have a cavity formed at the center thereof. A plurality of thermal vias is formed surrounding the substrate. The head sink is divided into a chip mount area and a thermal via joint area. The chip mount area is used for a chip mount pad to be disposed thereon, wherein a chip is connected to the heat sink through the chip mount pad. The thermal via area is electrically coupled to the thermal vias thereby to form an approximate short path or a short path. Thus, heat energy is transferred not only by the heat sink directly, but also from the heat sink to the substrate through the thermal vias.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: January 16, 2001
    Assignee: World Wiser Electronics Inc.
    Inventors: T. J. Tseng, David C. H. Cheng