Patents by Inventor Tadanori Nishikobara

Tadanori Nishikobara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8442662
    Abstract: A measurement parameter input control method and a measurement parameter input control device are provided which can intuitively change measurement parameters, which are set for a target device and are necessary for various measuring processes, with high operability.
    Type: Grant
    Filed: February 7, 2011
    Date of Patent: May 14, 2013
    Assignee: Anritsu Corporation
    Inventors: Yohei Niki, Eiji Takeda, Tadanori Nishikobara, Keita Masuhara, Takashi Murakami
  • Patent number: 8391346
    Abstract: When an operating unit is operated to designate an arbitrary width W and an arbitrary angle ?, a mask region limiting unit limits the effective range of a reference mask set for compliance measurement of the data signal to be evaluated by a reference mask setting unit to the range determined by the designated width and angle and displays the limited effective range on a display unit. When the mask region limiting unit limits the effective range of the reference mask, a quality evaluating unit performs compliance measurement and quality evaluation for the limited effective range in operative association with the limitation of the effective range.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: March 5, 2013
    Assignee: Anritsu Corporation
    Inventors: Keita Masuhara, Tadanori Nishikobara
  • Patent number: 8143959
    Abstract: A jitter generation apparatus for applying a phase modulation to a PLL is controlled by a control unit so as to output a signal with the desired jitter based on a parameters. When a switching unit is switched to a first state, the control unit controls first and second level control units so that the desired jitter in which an amplitude of a first modulation signal matches the parameter is added to an output signal from a voltage controlled oscillator unit, and passes through a quadrature modulator. When the switching unit is switched to the second state, the control unit controls the first and second level control units so that a quadrature modulation is applied to a local signal, which is input to the quadrature modulator without adding any jitter to an output signal from the voltage controlled oscillator unit, and a quadrature-modulated local signal is output.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: March 27, 2012
    Assignee: Anritsu Corporation
    Inventors: Katsuyuki Yaginuma, Tadanori Nishikobara
  • Publication number: 20110268170
    Abstract: When an operating unit is operated to designate an arbitrary width W and an arbitrary angle ?, a mask region limiting unit limits the effective range of a reference mask set for compliance measurement of the data signal to be evaluated by a reference mask setting unit to the range determined by the designated width and angle and displays the limited effective range on a display unit. When the mask region limiting unit limits the effective range of the reference mask, a quality evaluating unit performs compliance measurement and quality evaluation for the limited effective range in operative association with the limitation of the effective range.
    Type: Application
    Filed: April 12, 2011
    Publication date: November 3, 2011
    Applicant: ANRITSU CORPORATION
    Inventors: Keita Masuhara, Tadanori Nishikobara
  • Publication number: 20110196515
    Abstract: A measurement parameter input control method and a measurement parameter input control device are provided which can intuitively change measurement parameters, which are set for a target device and are necessary for various measuring processes, with high operability.
    Type: Application
    Filed: February 7, 2011
    Publication date: August 11, 2011
    Applicant: ANRITSU CORPORATION
    Inventors: Yohei Niki, Eiji Takeda, Tadanori Nishikobara, Keita Masuhara, Takashi Murakami
  • Publication number: 20110119622
    Abstract: A plurality of display windows corresponding to a plurality of applications is formed from a plurality of fixed window frames that is displayed with regularity on one display screen of a display unit. A display control unit performs display control by sequentially displaying displays relating to the plurality of applications in a switching manner in the order in which the plurality of applications is selected in a time series in the fixed window display frames that are displayed with regularity on one display screen of the display unit when the plurality of applications is selected in the time series.
    Type: Application
    Filed: November 11, 2010
    Publication date: May 19, 2011
    Applicant: ANRITSU CORPORATION
    Inventors: Yohei Niki, Eiji Takeda, Tadanori Nishikobara, Keita Masuhara, Takashi Murakami
  • Publication number: 20100150218
    Abstract: A jitter generation apparatus for applying a phase modulation to a PLL is controlled by a control unit so as to output a signal with the desired jitter based on a parameters. When a switching unit is switched to a first state, the control unit controls first and second level control units so that the desired jitter in which an amplitude of a first modulation signal matches the parameter is added to an output signal from a voltage controlled oscillator unit, and passes through a quadrature modulator. When the switching unit is switched to the second state, the control unit controls the first and second level control units so that a quadrature modulation is applied to a local signal, which is input to the quadrature modulator without adding any jitter to an output signal from the voltage controlled oscillator unit, and a quadrature-modulated local signal is output.
    Type: Application
    Filed: March 1, 2010
    Publication date: June 17, 2010
    Applicant: ANRITSU CORPORATION
    Inventors: Katsuyuki Yaginuma, Tadanori Nishikobara
  • Patent number: 7574311
    Abstract: In order to stably measure an input interval time of a pulse signal with high precision, a time interval measuring apparatus includes a reference signal generator, a phase shifter, first and second A/D converters, an error correction unit, an instantaneous phase calculation unit, and an interval time calculation unit. The phase shifter divides a reference signal of a sine wave having a predetermined frequency from the reference signal generator into a first analog signal and a second analog signal having phases shifted to each other. The first and second A/D converters perform sampling of the first analog signal and the second analog signal from the phase shifter, respectively, at an input timing of a pulse signal to be measured, and output a first and second digital sample values.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: August 11, 2009
    Assignee: Anritsu Corporation
    Inventors: Ken Mochizuki, Osamu Sugiyama, Tadanori Nishikobara
  • Publication number: 20080172194
    Abstract: In order to stably measure an input interval time of a pulse signal with high precision, a time interval measuring apparatus includes a reference signal generator, a phase shifter, first and second A/D converters, an error correction unit, an instantaneous phase calculation unit, and an interval time calculation unit. The phase shifter divides a reference signal of a sine wave having a predetermined frequency from the reference signal generator into a first analog signal and a second analog signal having phases shifted to each other. The first and second A/D converters perform sampling of the first analog signal and the second analog signal from the phase shifter, respectively, at an input timing of a pulse signal to be measured, and output a first and second digital sample values.
    Type: Application
    Filed: June 16, 2006
    Publication date: July 17, 2008
    Applicant: ANRITSU CORPORATION
    Inventors: Ken Mochizuki, Osamu Sugiyama, Tadanori Nishikobara
  • Patent number: 7010444
    Abstract: A clock generating unit generates a clock signal having a predetermined frequency. A pattern generating unit outputs a data signal having a predetermined pattern in which one frame is configured from a predetermined bit length, so as to be synchronized with the clock signal. A waveform information acquiring unit receives the data signal as a data signal to be measured, and receives the clock signal, and acquires information of waveform in the same time domain of the data signal to be measured and the clock signal. An averaging processing unit carries out averaging processing on an acquired waveform. A phase difference detecting unit detects a phase difference of the data signal to be measured and the clock signal, for each bit, based on an averaged waveform information. A frequency band limiting processing unit carries out predetermined frequency band limiting processing on the per-bit phase difference information.
    Type: Grant
    Filed: December 15, 2003
    Date of Patent: March 7, 2006
    Assignee: Anritsu Corporation
    Inventors: Tadanori Nishikobara, Kazuhiko Ishibe
  • Publication number: 20040143406
    Abstract: A clock generating unit generates a clock signal having a predetermined frequency. A pattern generating unit outputs a data signal having a predetermined pattern in which one frame is configured from a predetermined bit length, so as to be synchronized with the clock signal. A waveform information acquiring unit receives the data signal as a data signal to be measured, and receives the clock signal, and acquires information of waveform in the same time domain of the data signal to be measured and the clock signal. An averaging processing unit carries out averaging processing on an acquired waveform. A phase difference detecting unit detects a phase difference of the data signal to be measured and the clock signal, for each bit, based on an averaged waveform information. A frequency band limiting processing unit carries out predetermined frequency band limiting processing on the per-bit phase difference information.
    Type: Application
    Filed: December 15, 2003
    Publication date: July 22, 2004
    Applicant: Anritsu Corporation
    Inventors: Tadanori Nishikobara, Kazuhiko Ishibe