Abstract: A television synchronizing signal processing circuit includes a reproduction/demodulation circuit for repetitively reading a video signal corresponding to one field from a video signal recording medium and demodulating the video signal and for separating a synchronizing signal from a reproduced/demodulated signal, a first delay circuit for permitting the video signal of the reproduced/demodulated signal which is supplied for every other field from the reproduction/demodulation circuit to be delayed by a time corresponding to one half the period H of a horizontal synchronizing signal, a second delay circuit for delaying a vertical synchronizing signal of the synchronizing signal which is supplied from the reproduction/demodulation circuit, and a waveform synthesizing circuit for synthesizing output signals from the first and second delay circuits to produce a composite video signal. In the processing circuit, the second delay circuit has a variable time TD which is variable within a range of0<TD<H/2.

Abstract: A television composite video signal processing circuit has a readout circuit for repeatedly reading out a one-field composite video signal from a disk memory. A delay circuit delays the composite video signal from the readout circuit by 1/2 of a horizontal sync signal period H, and a pedestal clamping circuit sets the pedestal levels of the composite video signals from the delay circuit and the readout circuit to a predetermined level. A signal selector alternately supplies the composite video signals from the readout circuit and the delay circuit to the pedestal clamping circuit for every other field, and a peak level correction circuit corrects the peak level of the delayed video signal in the delayed composite video signal from the delay circuit.

Abstract: A television synchronization signal processing circuit includes a reproduction/demodulation circuit for reproducing a video signal by repeatedly reading out a video signal for one field from a video signal recording medium, generating the reproduced video signal and a synchronization signal separated from the reproduced video signal, a first delay circuit for delaying the reproduced video signal read out for every other field from the reproduction/demodulation circuit by one half a period of the horizontal synchronization signal, signal transmitting circuit for transmitting a vertical synchronization signal included in the separated synchronization signal from the reproduction/demodulation circuit, and waveform synthesis circuit for synthesizing output signals from the first delay circuit and signal transmitting circuit to produce a composite video signal used for effecting video display.

Abstract: A power supply circuit for driving a motor includes a rectifier circuit and a converter circuit for stepping down the DC voltage from the rectifier circuit to drive a motor. The power supply circuit further includes a regulator circuit which is energized by the DC output voltage from the converter circuit to supply a constant voltage or current to the motor.