Abstract: There is provided a semiconductor circuit including three or more nodes at least including one input node and one output node, plural paths which are connected between the three or more nodes and whose signal propagation directions between the nodes are regulated, a signal propagation time regulator for regulating a signal propagation time of each of the paths, an input unit for inputting a predetermined input signal to the input node, and a detector for detecting a time required for the input signal to propagate through the paths and arrive at the output node.

Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data, and this computing unit computes input digit data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1–3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.

Abstract: A healthcare system including: a store-specific terminal accepts and transmits an ID of a user, daily life information on daily life of the user, and biological information on the user; health information registering system generates healthcare support information used for healthcare of the user based on at least the daily life information and has a database for registering the ID, the daily life information, and the biological information on the user and the healthcare support information; and a user terminal outputs the healthcare support information registered in the database.

Abstract: There is provided a rubber composition for a tread obtained by compounding (a) 5-40 parts by mass of a softening agent including an oil in which an extraction quantity with dimethylsulfoxide (DMSO) by IP346 process is controlled to less than 3% by mass and (b) 5-40 parts by mass of a liquid polymer having a viscosity average molecular weight of 45,000-100,000 based on 100 parts by mass of a rubber component, and considerably improving the fracture properties and wear resistance and controlling the lowering of the modulus of elasticity as compared with the case of compounding the conventional high aromatic oil.

Abstract: A function reconfigurable semiconductor device is provided. The function reconfigurable semiconductor device includes a plurality of function cells, each of the function cells being a basic unit which realizes a function; each of the function cells including a plurality of threshold elements; each of the threshold elements including means which stores a threshold value; and wherein a function which is realized by the function cell is determined by determining the threshold value in each of the threshold elements. In addition, the semiconductor device includes a nonvolatile memory which stores data for realizing the function in the function cells.

Abstract: A video playback device of decoding encoded video data is additionally provided with a compression circuit and a decompression circuit in an existing encoded video decoding circuit. In the compression circuit, a frequency transform circuit transforms played-back video data obtained from the encoded video decoding circuit into frequency coefficient data, which is in turn subjected to IDCT having a reduced order in a frequency compression circuit to obtain compressed video data. The compressed video data, which is image space data having a reduced image size, is stored in a frame memory. The decompression circuit comprises a frequency decompression circuit and an inverse frequency transform circuit which performs a process inverse to that of the compression circuit. The compressed video data from the frame memory is converted by a video output circuit into data which can be displayed, and the resultant data is output to a video display device.

Abstract: The present invention relates to a tire characterized by using as a member, a rubber composition comprising (a) a rubber component comprising at least one selected from a natural rubber and a diene base synthetic rubber, (b) silica having a nitrogen-absorbing specific surface area (N2SA) of 180 to 270 m2/g and 0.1 to 10.0 mass parts of (c) a partial ester compound of maleic anhydride and a (poly)oxypropylene derivative per 100 mass parts of the rubber component described above. Further, the present invention relates to a tire characterized by using as a tread rubber, a rubber composition comprising (A) a rubber component comprising a conjugate diene base rubber, (B) a filler comprising 10 mass % or more of a white filler based on the whole fillers and (C) a partial ester compound of maleic anhydride and a (poly)oxypropylene derivative.

Abstract: A method of forming an oxide film having high insularity capability is performed within an ultra clean environment, using charged particles.

Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are moveable among them and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.

Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data, and this computing unit computes input digit data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.

Abstract: This invention provides a method and apparatus for signal reproduction that can simultaneously reproduce N (N?2) signals which are previously multiplexed, and simultaneously reproduce N independent signals. This apparatus selectively inputs the independent N coded signals in time division, adds the corresponding stream information to the selected input signal among N kinds of stream information for identifying the input signals, detects the stream information from the respective input signal, decodes the respective input signal by a decoding method corresponding to the respective input signal, which is decided based on the detected stream information, and outputs the decoded signal.

Abstract: The present invention enables recognition of a similar image as a similar image data when an image processing of the similar image is performed, and precisely recognizes a relatively complicated image. The present invention includes: a vector generating section 1 for extracting an image data of a region that is defined corresponding to a predetermined position inside an inputted image and expressing a vector of this image data; a storage section 2 having a plurality of pattern groups that contain at least one reference pattern belonging to a predetermined class; a similarity calculating section 3 for checking the vectorized image data with each of the reference patterns, and evaluating a similarity between each of the reference patterns and the image data; and a WTA circuit 4 for performing a predetermined calculation on each evaluation value of the similarity to thereby determine at least one evaluation value.

Abstract: SRAMs A, B, C, and D having pixel data of each small block of each large block, for example a small block Aij for the SRAM A, to simultaneously read out a plurality of pixel data in the small block by specifying an address assigned to each small block, and a matrix of coefficient in which a matrix of plural coefficients are arranged are provided. Also provided are a coefficient matrix controller 12 and an adding section 13 to multiply the plural coefficients respectively by pixel data corresponding to each thereof and obtain a sum of the multiplied results. Each pixel data of each small block forming one large block, the pixel data being read out from the SRAMs A, B, C, and D, are multiplied by the coefficient matrix rearranged into a predetermined order.

Abstract: Computation is performed by a row computation section to pixel data stored in a first memory cell in a memory unit in a specified column, and a computed result thereof is stored in a second memory cell. Subsequently, computation is performed by a column computation section for the processing data stored in a second memory cell in a memory unit in a specified row, a computed result thereof is stored in a third memory cell, and based on the computed result, filtering is performed.

Abstract: There is provided a semiconductor circuit including three or more nodes at least including one input node and one output node, plural paths which are connected between the three or more nodes and whose signal propagation directions between the nodes are regulated, a signal propagation time regulator for regulating a signal propagation time of each of the paths, an input unit for inputting a predetermined input signal to the input node, and a detector for detecting a time required for the input signal to propagate through the paths and arrive at the output node.

Abstract: In each processor of a plurality of processors provided in one chip, an instruction to be executed by an instruction code inputted thereto is to be determined uniquely, based on input history of the instruction codes, from the plural instructions assigned to the instruction codes by an decoder circuit. Accordingly, every instruction can be expressed by a short instruction code length, with one instruction code corresponding to the plural instructions, as well as different kinds of instructions can be executed, based on the input history of the instruction codes, by the same instruction code.

Abstract: A smooth reproduced picture is produced at inverse playback, without losing of naturality of display. Picture output candidate frames are decided such that intervals between frame are uniform on a time axis at a normal playback. When the candidate frame exists in a group of pictures (GOP) preceding a GOP which is presently displayed and a number of frames in the GOP is unknown, a frame among one of a last or a second to last I or P coded frame in the GOP, which is nearer to a true picture output frame is decided as a picture output candidate frame.

Abstract: There is provided a semiconductor circuit for arithmetic processing and an arithmetic processing method that can increase the rate of processing data and reduces the area of a circuit by suppressing wasteful processing. There is provided a computing unit for computing input data within a computation time unit and outputs a computation result representing a result obtained by the computation, and if a carry is generated in the computation a computation circuit (adders 1-3) for outputting carry data representing this carry, and delay means (memory 4) for delaying the computation result from the computation circuit by one computation time unit, are provided.

Abstract: A semiconductor arithmetic unit which realizes a maximum or minimum value retrieval operation at high speed and with a high degree of accuracy used in a vector quantization processor is composed of a binary-multivalue-analog merged operation processing circuit. A multi-loop circuit includes an amplifying circuit group composed of a plurality of sets of first amplifiers with a floating gate to which first electrodes and a single second electrode are capacitively coupled with a predetermined ratio, a logical operation circuit to which output signals of the amplifying circuit group are inputted and which outputs a logical 0 or 1, and a second amplifying circuit to which an output signal of the logical operation circuit is inputted and whose output is distributed to all of the second electrodes of the amplifying circuit group.

Abstract: A computing circuit capable of computing an absolute difference with high-speed analog computation, a computing apparatus capable of computing the sum of absolute differences and a semiconductor computing circuit achievable with simple circuitry and suitable for use in such a computing circuit or apparatus. The computing circuit capable of computing the absolute difference includes a large input selection circuit 1 which outputs either a first signal or a second signal whichever is larger, a small input selection circuit 2 which outputs either the first and second signals whichever signal is smaller, and a subtraction circuit 3 which subtracts the output of the small input selection circuit 2 from the output of the large input selection circuit 1.