Patents by Inventor Tadayoshi Muta
Tadayoshi Muta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8786091Abstract: A semiconductor apparatus with a penetrating electrode having a high aspect ratio is manufactured with a low-temperature process. In one embodiment a first electrode 3 and a second electrode 6 of a semiconductor substrate 1 that are provided at the front and rear surface sides, respectively, are electrically connected by a conductive object 7 filled in a contact hole 4 and an extended portion 6a of the second electrode 6 extends to the contact hole 4. Even though the contact hole 4 has a high aspect ratio, film formation using the low-temperature process is enabled by using the conductive object 7, instead of forming the second electrode 6 on a bottom portion of the contact hole 4.Type: GrantFiled: October 19, 2009Date of Patent: July 22, 2014Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Muta
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Patent number: 8546801Abstract: Provided is a semiconductor apparatus which may check a state of connection of a penetrating electrode in a semiconductor substrate with ease. A semiconductor apparatus manufacturing method includes: forming in a semiconductor substrate at least three kinds of the through-holes each having a large area, a middle area, and a small area of openings; forming a conductive layer on an inner surface of the at least three kinds of the through-holes having different areas of the openings to form the penetrating electrodes; and measuring resistance values of the penetrating electrode including the through-hole having the large area of the opening and the penetrating electrode including the through-hole having the small area of the opening among the three kinds of the penetrating electrodes to determine states of connection of the penetrating electrodes.Type: GrantFiled: March 17, 2009Date of Patent: October 1, 2013Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Muta
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Publication number: 20130228931Abstract: There is provided a method of manufacturing the semiconductor apparatus, including: forming through-hole which penetrates a semiconductor substrate at a point that corresponds to a location of an electrode pad; forming an insulating film on a rear surface of the semiconductor substrate, including the interior of the through-hole; forming an adhesion securing layer from a metal or an inorganic insulator on a surface of the insulating film at least in an opening portion of the through-hole; forming a resist layer to serve as a mask in bottom etching on the adhesion securing layer; performing bottom etching to expose the electrode pad; removing the resist layer to obtain the insulating film free of surface irregularities that would otherwise have been created by bottom etching; forming a barrier layer, a seed layer, and a conductive layer by a low-temperature process; and performing patterning.Type: ApplicationFiled: April 12, 2013Publication date: September 5, 2013Applicant: CANON KABUSHIKI KAISHAInventor: Tadayoshi Muta
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Patent number: 8440565Abstract: There is provided a method of manufacturing the semiconductor apparatus, including: forming through-hole which penetrates a semiconductor substrate at a point that corresponds to a location of an electrode pad; forming an insulating film on a rear surface of the semiconductor substrate, including the interior of the through-hole; forming an adhesion securing layer from a metal or an inorganic insulator on a surface of the insulating film at least in an opening portion of the through-hole; forming a resist layer to serve as a mask in bottom etching on the adhesion securing layer; performing bottom etching to expose the electrode pad; removing the resist layer to obtain the insulating film free of surface irregularities that would otherwise have been created by bottom etching; forming a barrier layer, a seed layer, and a conductive layer by a low-temperature process; and performing patterning.Type: GrantFiled: November 18, 2009Date of Patent: May 14, 2013Assignee: Canon Kabushiki KaishaInventor: Tadayoshi Muta
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Publication number: 20110147941Abstract: A semiconductor apparatus with a penetrating electrode having a high aspect ratio is manufactured with a low-temperature process. A first electrode 3 and a second electrode 6 of a semiconductor substrate 1 that are provided at the front and rear surface sides, respectively, are electrically connected by a conductive object 7 filled in a contact hole 4 and an extended portion 6a of the second electrode 6 extends to the contact hole 4. Even though the contact hole 4 has a high aspect ratio, film formation using the low-temperature process is enabled by using the conductive object 7, instead of forming the second electrode 6 on a bottom portion of the contact hole 4.Type: ApplicationFiled: October 19, 2009Publication date: June 23, 2011Applicant: CANON KABUSHIKI KAISHAInventor: Tadayoshi Muta
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Publication number: 20110006303Abstract: Provided is a semiconductor apparatus which may check a state of connection of a penetrating electrode in a semiconductor substrate with ease. A semiconductor apparatus manufacturing method includes: forming in a semiconductor substrate at least three kinds of the through-holes each having a large area, a middle area, and a small area of openings; forming a conductive layer on an inner surface of the at least three kinds of the through-holes having different areas of the openings to form the penetrating electrodes; and measuring resistance values of the penetrating electrode including the through-hole having the large area of the opening and the penetrating electrode including the through-hole having the small area of the opening among the three kinds of the penetrating electrodes to determine states of connection of the penetrating electrodes.Type: ApplicationFiled: March 17, 2009Publication date: January 13, 2011Applicant: CANON KABUSHIKI KAISHAInventor: Tadayoshi Muta
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Publication number: 20100127403Abstract: There is provided a method of manufacturing the semiconductor apparatus, including: forming through-hole which penetrates a semiconductor substrate at a point that corresponds to a location of an electrode pad; forming an insulating film on a rear surface of the semiconductor substrate, including the interior of the through-hole; forming an adhesion securing layer from a metal or an inorganic insulator on a surface of the insulating film at least in an opening portion of the through-hole; forming a resist layer to serve as a mask in bottom etching on the adhesion securing layer; performing bottom etching to expose the electrode pad; removing the resist layer to obtain the insulating film free of surface irregularities that would otherwise have been created by bottom etching; forming a barrier layer, a seed layer, and a conductive layer by a low-temperature process; and performing patterning.Type: ApplicationFiled: November 18, 2009Publication date: May 27, 2010Applicant: CANON KABUSHIKI KAISHAInventor: Tadayoshi Muta
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Patent number: 7125810Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.Type: GrantFiled: October 15, 2004Date of Patent: October 24, 2006Assignee: Canon Kabushiki KaishaInventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
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Patent number: 6856023Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.Type: GrantFiled: January 22, 2003Date of Patent: February 15, 2005Assignee: Canon Kabushiki KaishaInventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
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Patent number: 6702413Abstract: A liquid discharge head which comprises an element substrate having on one surface thereof energy generating element for generating energy to be utilized for discharging liquid from a liquid discharge port, and a liquid supply port communicated with the liquid discharge port, a printed substrate provided with an external fetch electrode, and an IC component for control use for the energy generating element having provided therefor an output side electrode connected with the energy generating element and an input side electrode connected with the external fetch electrode. For this liquid discharge head, at least the aforesaid output side electrode of the IC component for control use is provided for the one surface of the element substrate.Type: GrantFiled: November 15, 2001Date of Patent: March 9, 2004Assignee: Canon Kabushiki KaishaInventors: Hiroshi Takabayashi, Tadayoshi Muta, Toru Yamane
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Publication number: 20030151144Abstract: The semiconductor device of the present invention comprises a substrate; at least one through hole formed through the substrate between front and back surfaces of the substrate; an electrical connection portion formed by a semiconductor process on at least one surface of the front and back surfaces of the substrate in a vicinity of an end opening of the through hole; an insulating layer formed of an organic material on an inside surface of the through hole; and an electroconductive layer formed on an inside surface of the insulating layer, wherein the electrical connection portion is electrically connected to the electroconductive layer to be electrically connected to a side of the other surface of the substrate.Type: ApplicationFiled: January 22, 2003Publication date: August 14, 2003Applicant: CANON KABUSHIKI KAISHAInventors: Tadayoshi Muta, Jin Tachikawa, Riichi Saito, Tadanori Suto, Manabu Takayama, Hiroyuki Morimoto
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Publication number: 20020149636Abstract: A liquid discharge head which comprises an element substrate having on one surface thereof energy generating element for generating energy to be utilized for discharging liquid from a liquid discharge port, and a liquid supply port communicated with the liquid discharge port, a printed substrate provided with an external fetch electrode, and an IC component for control use for the energy generating element having provided therefor an output side electrode connected with the energy generating element and an input side electrode connected with the external fetch electrode. For this liquid discharge head, at least the aforesaid output side electrode of the IC component for control use is provided for the one surface of the element substrate.Type: ApplicationFiled: November 15, 2001Publication date: October 17, 2002Inventors: Hiroshi Takabayashi, Tadayoshi Muta, Toru Yamane
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Publication number: 20020125546Abstract: A semiconductor device for transmitting information by using an induction field as a transmission medium comprises: an IC chip for storing and processing information to be transmitted; a coil for generating the induction field; andconnecting terminals provided at an end of the coil and electrically connected to the IC chip, wherein the coil and the connecting terminals are formed of the same metal plate which is patterned.Type: ApplicationFiled: January 23, 2002Publication date: September 12, 2002Inventor: Tadayoshi Muta
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Patent number: 4699640Abstract: A clean room is adapted to provide a plurality of clean air zones with different degrees of cleanliness. Air is passed through high efficiency particulate air filters in the ceiling of the room and withdrawn through shutters in the floor of the room. The shutters are adjustable to maintain a pressure-balanced system. The room is divided by walls and partitions to define different zones which are filtered by different classes of filters depending on the degree of cleanliness required in each zone.Type: GrantFiled: July 14, 1986Date of Patent: October 13, 1987Assignee: Kajima CorporationInventors: Masami Suzuki, Kouki Yamaguchi, Hisato Katayama, Tadayoshi Muta, Masakuni Okubo, Akira Mochizuki, Hiroshi Adachi