Abstract: A semiconductor device includes a semiconductor layer, an active region defined in the semiconductor layer, first fingers provided on the active region and arranged in parallel with respect to a first direction, second fingers provided on the active region and interleaved with the first fingers, a bus line that is provided on an outside of the active region and interconnects the first fingers, first air bridges that are provided on the outside of the active region and are extended over the bus line, and that are connected to the second fingers, and second air bridges that are provided on the outside of the active region and are arranged in a second direction which crosses to the first direction, and that interconnect the first air bridges.

Abstract: A semiconductor device includes a semiconductor layer, an active region defined in the semiconductor layer, first fingers provided on the active region and arranged in parallel with respect to a first direction, second fingers provided on the active region and interleaved with the first fingers, a bus line that is provided on an outside of the active region and interconnects the first fingers, first air bridges that are provided on the outside of the active region and are extended over the bus line, and that are connected to the second fingers, and second air bridges that are provided on the outside of the active region and are arranged in a second direction which crosses to the first direction, and that interconnect the first air bridges.

Abstract: A semiconductor device includes a substrate having a first principal surface carrying thereon a first wiring pattern and a semiconductor chip having a second principal surface carrying a second wiring pattern thereon. The semiconductor chip is disposed on the substrate such that said second principal surface faces the first principal surface and a conductor is used for connecting the first wiring pattern and the second wiring pattern electrically and mechanically. The second wiring pattern includes a power conductor pattern, wherein a distance between the first principal surface and the second principal surface is increased selectively in correspondence to a part of the second principal surface on which the power conductor pattern is provided.