Abstract: The simulation system for predicting heating and cooling loads of a building comprises the collection unit collecting measurement data of a target building from a BEMS, the identification unit identifying indoor and outdoor temperature, humidity, and insolation measured in the building in real time based on RTS method, the correlation derivation unit deriving a correlation between energy usage based on the BEMS measurement data collected by the collection unit and the cooling and heating loads according to indoor and outdoor temperature, humidity, and insolation identified by the identification unit, the simulation unit predicting a change in cooling and heating loads according to a change in at least one of pieces of measurement data based on the correlation derived from the correlation derivation unit to perform a simulation, and the information provision unit providing a simulation result from the simulation unit in a visible form to a user terminal.

Abstract: An aspect of the present disclosure provides a bus bar as a winding in a core of a transformer includes multiple sub-bars arranged horizontally and connected in parallel so as to minimize an AC current in the transformer, and the sub-bars have different widths and thus resistances or impedances with respect to a current flowing through the sub-bars are the same. Another aspect of the present disclosure provides a method of designing a bus bar for resistance or impedance matching between multiple sub-bars included in the bus bar to share a current to minimize an AC current in the transformer. Another aspect of the present disclosure provides a transformer, for a DC-DC converter for use in a vehicle, which is manufactured by the method of designing a bus bar.

Abstract: Provided are a hyperparameter optimizer and method for optimizing hyperparameters and a spiking neural network processing unit. The optimizer includes a statistical analyzer configured to receive training data and perform statistical analysis on the training data, an objective function generator configured to generate hyperparameter-specific objective functions by using a statistical analysis value of the statistical analyzer, and an optimal hyperparameter selector configured to select optimal hyperparameters according to certain rules on the basis of the hyperparameter-specific objective functions.

Abstract: A battery pack includes a battery module configured to accommodate a number of battery cells, and a lower protective cover including a lower panel detachably coupled to a lower portion of the battery module and a number of buffer parts on one surface of the lower panel. A structure of the lower protective cover of the battery pack may be improved to absorb an impact from a lower side of a vehicle. A cross-sectional shape of the buffer part of the lower protective cover may be changed to adjust and design an impact absorption value.

Abstract: An ultrasound probe, including a transducer module configured to receive an echo ultrasound signal reflected from a subject in response to a transmitted ultrasound signal, and a driver chip provided in the transducer module, the driver chip being configured to focus at least one of the ultrasound signal and the echo ultrasound signal, wherein the driver chip includes a fine analog beamformer configured to apply a fine delay and a coarse analog beamformer configured to apply a coarse delay, wherein the fine analog beamformer is arranged in a first inner region of a plurality of inner regions of the driver chip, the first inner region being located opposite to the transducer module, and wherein the coarse analog beamformer is arranged in a second inner region of the plurality of inner regions of the driver chip, the second inner region being different from the first inner region.

Abstract: Provided are an ultrasonic probe and a method of manufacturing the same. The method includes: forming a plurality of grooves by removing regions of a first insulating layer and a first silicon wafer from a first substrate including the first silicon wafer and the first insulating layer; bonding a second substrate including a second silicon wafer, a second insulating layer, and a silicon thin layer to the first substrate, such that the plurality of grooves turn into a plurality of cavities; removing the second silicon wafer from the second substrate; forming transducer cells on regions of the second insulating layer corresponding to the plurality of cavities; and forming a plurality of unit substrates by cutting the first substrate, the silicon thin layer, and the second insulating layer.

Abstract: Provided is a method for forming a thin film. The method for forming the thin film includes forming a first thin film having a first thickness with first crystallinity through an atomic layer deposition process and etching the first thin film by a predetermined thickness through an atomic layer etching process with respect to the first thin film to form a second thin film having a second thickness less than the first thickness.

Abstract: Provided are a substrate processing apparatus and a substrate processing method using the same and, more particularly, a substrate processing apparatus capable of controlling deposition of a reactive-metal-containing precursor in an exhaust line, and a substrate processing method using the same.

Abstract: Provided is a method for forming a thin film. The method for forming the thin film includes forming a first thin film having a first thickness with first crystallinity through an atomic layer deposition process and etching the first thin film by a predetermined thickness through an atomic layer etching process with respect to the first thin film to form a second thin film having a second thickness less than the first thickness.

Abstract: There are provided an ultrasonic apparatus and a beamforming method for the ultrasonic apparatus. According to an aspect, an ultrasonic apparatus includes a 2D array transducer in which a plurality of elements are arranged in a plurality of rows and columns; a signal supplier configured to supply an ultrasonic signal to the 2D array transducer; a first delayer configured to delay the ultrasonic signal to output a plurality of first delay signals corresponding to any one of the number of rows and the number of columns; and a second delayer configured to delay one of the plurality of first delay signals to output a plurality of second delay signals corresponding to the other one of the number of rows and the number of columns, and transmit the plurality of second delay signals to the 2D array transducer.

Abstract: Provided is a method of controlling an operation of a channel including at least one transducer, which includes comparing a voltage corresponding to current flowing into the channel to a threshold voltage and controlling the operation of the channel based on a result of the comparing.

Abstract: Provided are an ultrasonic probe and a method of manufacturing the same. The method includes: forming a plurality of grooves by removing regions of a first insulating layer and a first silicon wafer from a first substrate including the first silicon wafer and the first insulating layer; bonding a second substrate including a second silicon wafer, a second insulating layer, and a silicon thin layer to the first substrate, such that the plurality of grooves turn into a plurality of cavities; removing the second silicon wafer from the second substrate; forming transducer cells on regions of the second insulating layer corresponding to the plurality of cavities; and forming a plurality of unit substrates by cutting the first substrate, the silicon thin layer, and the second insulating layer.

Abstract: An ultrasound probe, including a transducer module configured to receive an echo ultrasound signal reflected from a subject in response to a transmitted ultrasound signal, and a driver chip provided in the transducer module, the driver chip being configured to focus at least one of the ultrasound signal and the echo ultrasound signal, wherein the driver chip includes a fine analog beamformer configured to apply a fine delay and a coarse analog beamformer configured to apply a coarse delay, wherein the fine analog beamformer is arranged in a first inner region of a plurality of inner regions of the driver chip, the first inner region being located opposite to the transducer module, and wherein the coarse analog beamformer is arranged in a second inner region of the plurality of inner regions of the driver chip, the second inner region being different from the first inner region.

Abstract: Provided are a substrate processing apparatus and a substrate processing method using the same and, more particularly, a substrate processing apparatus capable of controlling deposition of a reactive-metal-containing precursor in an exhaust line, and a substrate processing method using the same.

Abstract: A display apparatus and driving method are discussed where the ultrasonic imaging apparatus includes an ultrasonic transducer configured to sequentially output a first ultrasonic signal, a second ultrasonic signal, and a third ultrasonic signal; a beamforming unit configured to generate a first synthesized signal by delaying the first ultrasonic signal and synthesizing the delayed first ultrasonic signal with the second ultrasonic signal, and to generate a second synthesized signal by delaying the first synthesized signal and synthesizing the delayed first synthesized signal with the third ultrasonic signal.

Abstract: Provided is a method of controlling an operation of a channel including at least one transducer, which includes comparing a voltage corresponding to current flowing into the channel to a threshold voltage and controlling the operation of the channel based on a result of the comparing.

Abstract: A semiconductor memory device includes a memory cell array configured to include memory cells, peripheral circuits configured to read out data stored in a selected memory cell in a read operation, and a controller configured to control the peripheral circuits so that the peripheral circuits sense a voltage level of the bit line when a first read voltage of the read voltages is supplied to the word line and the peripheral circuits sense voltage levels of the bit line when a second read voltage lower than the first read voltage by a specific level and a third read voltage higher than the first read voltage by the specific level are supplied to the word line in order to determine whether a threshold voltage of the selected memory cell falls within a set voltage distribution in the read operation.

Abstract: A semiconductor device includes a first operation circuit configured to generate addition data by adding a column address and a page address and output a remainder obtained by dividing the addition data by a set value as seed data, a mask data output circuit configured to output mask data corresponding to the respective seed data, and a second operation circuit configured to generate random data by performing a logic operation on the mask data and program data corresponding to the column and page addresses.

Abstract: A semiconductor memory device includes memory cells arranged at regions where word lines and bit lines cross each other; a randomizing and de-randomizing circuit configured to perform a first randomizing operation on data to be programmed to the memory cells, based on a seed value, so as to generate first randomized data; a data reading/writing circuit configured to perform a second randomizing operation on the first randomized data using a data inverting operation so as to generate second randomized data and program the second randomized data to the memory cells; and a control logic configured to control the randomizing and de-randomizing circuit and the data reading/writing circuit.

Abstract: A semiconductor memory device is configured to internally perform a test operation utilizing a random data pattern. The semiconductor memory device includes a random data pattern test unit that operates under control of on-board control logic that also manages normal operation of the semiconductor memory device. The control logic controls test operation of the semiconductor memory device in response to simple commands received from an external device. Therefore, the test time may be reduced more than when a test is entirely controlled by an external device. Furthermore, since the external device does not need to manage the random data pattern, the test cost may be reduced more than when a test is performed under control of the external device.