Patents by Inventor Tae Hoan Jang

Tae Hoan Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of forming enhanced UBM structure for improving solder joint reliability
    Patent number: 7989356
    Abstract: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. An under bump metallization layer (UBM) is formed over the third insulating layer and second conductive layer. A UBM build-up structure is formed over the UBM. The UBM build-up structure has a sloped sidewall and is confined within a footprint of the UBM. The UBM build-up structure extends above the UBM to a height of 2-20 micrometers. The UBM build-up structure is formed in sections occupying less than an area of the UBM. A solder bump is formed over the UBM and UBM build-up structure. The sections of the UBM build-up structure provide exits for flux vapor escape.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: August 2, 2011
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Xusheng Bao, Yaojian Lin, Tae Hoan Jang
  • Integrated circuit package system with package substrate having corner contacts and method of manufacture thereof
    Patent number: 7863726
    Abstract: A method of manufacture of an integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate; mounting an integrated circuit device over the top substrate side; connecting an electrical interconnect between the integrated circuit device and the top substrate side; and forming a package encapsulation over the top substrate side, the integrated circuit device, and the electrical interconnect.
    Type: Grant
    Filed: November 4, 2009
    Date of Patent: January 4, 2011
    Assignee: Stats Chippac Ltd.
    Inventors: Seng Guan Chow, Tae Hoan Jang
  • Semiconductor Device and Method of Forming Enhanced UBM Structure for Improving Solder Joint Reliability
    Publication number: 20100244239
    Abstract: A semiconductor device has a first conductive layer formed over a substrate. A first insulating layer is formed over the first conductive layer. A second conductive layer is formed over first insulating layer and first conductive layer. A third insulating layer is formed over the second insulating layer and second conductive layer. An under bump metallization layer (UBM) is formed over the third insulating layer and second conductive layer. A UBM build-up structure is formed over the UBM. The UBM build-up structure has a sloped sidewall and is confined within a footprint of the UBM. The UBM build-up structure extends above the UBM to a height of 2-20 micrometers. The UBM build-up structure is formed in sections occupying less than an area of the UBM. A solder bump is formed over the UBM and UBM build-up structure. The sections of the UBM build-up structure provide exits for flux vapor escape.
    Type: Application
    Filed: March 24, 2009
    Publication date: September 30, 2010
    Applicant: STATS ChipPAC, Ltd.
    Inventors: Xusheng Bao, Yaojian Lin, Tae Hoan Jang
  • INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS AND METHOD OF MANUFACTURE THEREOF
    Publication number: 20100052150
    Abstract: A method of manufacture of an integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate; mounting an integrated circuit device over the top substrate side; connecting an electrical interconnect between the integrated circuit device and the top substrate side; and forming a package encapsulation over the top substrate side, the integrated circuit device, and the electrical interconnect.
    Type: Application
    Filed: November 4, 2009
    Publication date: March 4, 2010
    Inventors: Seng Guan Chow, Tae Hoan Jang
  • Integrated circuit package system with package substrate having corner contacts
    Patent number: 7646105
    Abstract: A integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate; mounting an integrated circuit device over the top substrate side; connecting an electrical interconnect between the integrated circuit device and the top substrate side; and forming a package encapsulation over the top substrate side, the integrated circuit device, and the electrical interconnect.
    Type: Grant
    Filed: November 16, 2007
    Date of Patent: January 12, 2010
    Assignee: Stats Chippac Ltd.
    Inventors: Seng Guan Chow, Tae Hoan Jang
  • INTEGRATED CIRCUIT PACKAGE SYSTEM WITH PACKAGE SUBSTRATE HAVING CORNER CONTACTS
    Publication number: 20090127719
    Abstract: A integrated circuit package system includes: forming a package substrate with a top substrate side and a bottom substrate side; forming a corner contact in a first corner of the bottom substrate side, the corner contact extending to a substrate edge of the package substrate; mounting an integrated circuit device over the top substrate side; connecting an electrical interconnect between the integrated circuit device and the top substrate side; and forming a package encapsulation over the top substrate side, the integrated circuit device, and the electrical interconnect.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 21, 2009
    Inventors: Seng Guan Chow, Tae Hoan Jang
  • Semiconductor package and method for fabricating the same
    Patent number: 7190071
    Abstract: There is provided a semiconductor package and method for fabricating the same.
    Type: Grant
    Filed: February 24, 2004
    Date of Patent: March 13, 2007
    Assignee: Amkor Technology, Inc.
    Inventors: Won Sun Shin, Seon Goo Lee, Do Sung Chun, Tae Hoan Jang, Vincent DiCaprio
  • Semiconductor package and method for fabricating the same
    Publication number: 20040164411
    Abstract: There is provided a semiconductor package and method for fabricating the same.
    Type: Application
    Filed: February 24, 2004
    Publication date: August 26, 2004
    Applicant: Amkor Technology, Inc.
    Inventors: Won Sun Shin, Seon Goo Lee, Do Sung Chun, Tae Hoan Jang, Vincent DiCaprio
  • Semiconductor package and method for fabricating the same
    Patent number: 6717248
    Abstract: There is provided a semiconductor package and method for fabricating the same.
    Type: Grant
    Filed: November 26, 2002
    Date of Patent: April 6, 2004
    Assignee: Amkor Technology, Inc.
    Inventors: Won Sun Shin, Seon Goo Lee, Do Sung Chun, Tae Hoan Jang, Vincent D. DiCaprio
  • Semiconductor package and method for fabricating the same
    Publication number: 20030100142
    Abstract: There is provided a semiconductor package and method for fabricating the same.
    Type: Application
    Filed: November 26, 2002
    Publication date: May 29, 2003
    Applicant: Amkor Technology, Inc.
    Inventors: Won Sun Shin, Seon Goo Lee, Do Sung Chun, Tae Hoan Jang, Vincent DiCaprio
  • Semiconductor package and method for fabricating the same
    Patent number: 6515356
    Abstract: There is provided a semiconductor package and method for fabricating the same.
    Type: Grant
    Filed: May 5, 2000
    Date of Patent: February 4, 2003
    Assignee: Amkor Technology, Inc.
    Inventors: Won Sun Shin, Seon Goo Lee, Do Sung Chun, Tae Hoan Jang, Vincent DiCaprio
  • Circuit board for semiconductor package
    Patent number: 6469258
    Abstract: A circuit board for semiconductor package is designed to provide a complete grounding with corresponding equipment in the manufacture of the semiconductor package based on a circuit board, thereby preventing a breakdown of the circuit board or semiconductor chip caused by electrostatic charges.
    Type: Grant
    Filed: August 23, 2000
    Date of Patent: October 22, 2002
    Assignees: Amkor Technology, Inc., Amkor Technology Korea, Inc.
    Inventors: Choon Heung Lee, Won Dai Shin, Chang Hoon Ko, Won Sun Shin, Seon Goo Lee, Won Kyun Lee, Tae Hoan Jang, Jun Young Yang