Abstract: A semiconductor memory device comprising a peripheral circuit structure and a cell structure stacked on the peripheral circuit structure, wherein the cell structure includes a cell substrate including a first face facing the peripheral circuit structure and a second face opposite the first face, a first mold stack including a plurality of first gate electrodes sequentially stacked on the first face, and a channel hole extending through the plurality of first gate electrodes. A channel structure includes a gate dielectric film, a semiconductor film, and a variable resistance film sequentially stacked in the channel hole, wherein the semiconductor film includes a sidewall portion intersecting the first face and the plurality of first gate electrodes, and a top plate portion extending from the sidewall portion in the cell substrate in a parallel manner to the first face.

Abstract: A system on chip is provided. The system on chip includes a first memory to store a plurality of encryption keys, a second memory, a third memory to store an encryption key setting value, and a CPU to decrypt encrypted data which is stored in an external non-volatile memory using an encryption key corresponding to the encryption key setting value from among the plurality of encryption keys, to store the decrypted data in the second memory, and to perform a boot using data stored in the second memory. Accordingly, security of a boot operation can be improved.

Abstract: A system on chip is provided. The system on chip includes a first memory to store a plurality of encryption keys, a second memory, a third memory to store an encryption key setting value, and a CPU to decrypt encrypted data which is stored in an external non-volatile memory using an encryption key corresponding to the encryption key setting value from among the plurality of encryption keys, to store the decrypted data in the second memory, and to perform a boot using data stored in the second memory. Accordingly, security of a boot operation can be improved.

Abstract: A system on chip is provided. The system on chip includes a first memory to store a plurality of encryption keys, a second memory, a third memory to store an encryption key setting value, and a CPU to decrypt encrypted data which is stored in an external non-volatile memory using an encryption key corresponding to the encryption key setting value from among the plurality of encryption keys, to store the decrypted data in the second memory, and to perform a boot using data stored in the second memory. Accordingly, security of a boot operation can be improved.

Abstract: A system on chip is provided. The system on chip includes a first memory to store a plurality of encryption keys, a second memory, a third memory to store an encryption key setting value, and a CPU to decrypt encrypted data which is stored in an external non-volatile memory using an encryption key corresponding to the encryption key setting value from among the plurality of encryption keys, to store the decrypted data in the second memory, and to perform a boot using data stored in the second memory. Accordingly, security of a boot operation can be improved.

Abstract: A system on chip is provided. The system on chip includes a first memory to store a plurality of encryption keys, a second memory, a third memory to store an encryption key setting value, and a CPU to decrypt encrypted data which is stored in an external non-volatile memory using an encryption key corresponding to the encryption key setting value from among the plurality of encryption keys, to store the decrypted data in the second memory, and to perform a boot using data stored in the second memory. Accordingly, security of a boot operation can be improved.

Abstract: An image forming apparatus and method of controlling the same, the image forming apparatus including: an article of consumption including a memory; and a print controller to perform a memory access to read and/or to write data from/to the memory. Addresses for the memory of the article of consumption are changed using access counts updated each time a memory access is requested, so that the memory access can be performed according to the changed addresses.

Abstract: An image processing method of converting a gray image into a halftone image, and an image forming apparatus using the same, the image processing method including: calculating critical values of a halftone table in positions of the halftone table from an initial pattern that has a smaller storage size than that of the halftone table, the halftone table corresponding to at least one pixel of the gray image; and creating the halftone image by applying a halftone process to pixels of the gray image on the basis of the calculated critical values of the halftone table. Accordingly, a memory used to store a halftone table is decreased, thereby reducing a cost of the memory, minimizing restriction on design, and speeding a halftone process up.

Abstract: An image forming apparatus and method of controlling the same, the image forming apparatus including: an article of consumption including a memory; and a print controller to perform a memory access to read and/or to write data from/to the memory. Addresses for the memory of the article of consumption are changed using access counts updated each time a memory access is requested, so that the memory access can be performed according to the changed addresses.