Patents by Inventor Tae Jeong

Tae Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230265172
    Abstract: The present invention relates to a humanized antibody specific to a Bacillus anthracis protective antigen and a preparation method thereof. An antibody library is created by obtaining a Bacillus anthracis protective antigen antibody of a monkey from immune cells obtained by immunizing a Bacillus anthracis protective antigen, an antibody specific to the Bacillus anthracis protective antigen is selected from the created antibody library, and, on the basis of the antibody, a humanized antibody specific to the Bacillus anthracis protective antigen is finally selected by creating a humanized antibody library against a Bacillus anthracis protective antigen.
    Type: Application
    Filed: July 26, 2021
    Publication date: August 24, 2023
    Inventors: Chi-Ho Yu, Chang-Hwan Kim, Gyeung-Haeng Hur, Seong-Tae Jeong, Dong-Hyun Song, Hae-Eun Joe, Na-Young Kim, Jun-Young Choi, Young-Kee Shin, Hyun-Ho Jeong, Seung-Chul Jun
  • Patent number: 11735083
    Abstract: A display device is provided. The display device comprises a display panel including a plurality of signal pads and one or more dummy pads, and at least one flexible wiring board providing signals to the signal pads, wherein a maximum bias period of signals provided to a pair of adjacent signal pads with at least one dummy pad interposed therebetween is longer than a maximum bias period of signals provided to a pair of adjacent signal pads with no dummy pad disposed therebetween.
    Type: Grant
    Filed: October 14, 2021
    Date of Patent: August 22, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Tae Hoon Kwon, Ji Hyun Ka, Byung Sun Kim, Yang Wan Kim, Hyung Jun Park, Su Jin Lee, Jae Yong Lee, Jin Tae Jeong, Seung Ji Cha
  • Publication number: 20230260455
    Abstract: A stage including: an output circuit connected to a first node and a second node; an input connected to a third node and a fourth node; and a plurality of signal processors between the output and the input, the plurality of signal processors electrically connecting the first node and the third node and electrically connecting the second node and the fourth node, wherein the input includes: a seventh transistor connected between a first input terminal and the fourth node and having a gate electrode connected to a second input terminal; a plurality of eighth transistors serially connected between the third node and the second input terminal and having gate electrodes connected to the fourth node; and a ninth transistor connected between the third node and a second power source and having a gate electrode connected to the second input terminal.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 17, 2023
    Inventors: SEUNG KYU LEE, Seung Ji Cha, Ji Hyun Ka, Tae Hoon Kwon, Min Ku Lee, Jin Tae Jeong
  • Patent number: 11727041
    Abstract: The invention relates to a method and a system for improving performance of text summarization and has an object of improving performance of a technique for generating a summary from a given paragraph. According to the invention to achieve the object, a method for improving performance of text summarization includes: an a step of generating an embedding vector by vectorizing a natural language-based context; a b step of generating a graph by using the embedding vector; a c step of assigning a weight depending on whether or not a keyword corresponding to at least one node included in the graph is present in the context; and a d step of selecting a path having a highest likelihood in the graph and generating a summary based on the path.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: August 15, 2023
    Inventors: Dong Hwan Kim, Han Su Kim, Woo Tae Jeong, Seung Hyeon Lee, Chang Hyeon Lim
  • Publication number: 20230255069
    Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between the display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.
    Type: Application
    Filed: April 14, 2023
    Publication date: August 10, 2023
    Inventors: JI-HYUN KA, Seung-Kyu Lee, Hwan-Soo Jang, Jin-Tae Jeong
  • Patent number: 11710046
    Abstract: A method of generating a question-answer learning model through adversarial learning may include: sampling a latent variable based on constraints in an input passage; generating an answer based on the latent variable; generating a question based on the answer; and machine-learning the question-answer learning model using a dataset of the generated question and answer, wherein the constraints are controlled so that the latent variable is present in a data manifold while increasing a loss of the question-answer learning model.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: July 25, 2023
    Inventors: Dong Hwan Kim, Woo Tae Jeong, Seanie Lee, Gilje Seong
  • Patent number: 11710455
    Abstract: A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: July 25, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jin Tae Jeong, Min Ku Lee, Ji Hyun Ka, Tae Hoon Kwon, Seung Kyu Lee, Seung Ji Cha
  • Patent number: 11700754
    Abstract: A display device includes a substrate having a display area and a non-display area, a plurality of pixels in the display area, scan lines for supplying a scan signal to the pixels, the scan lines extending in a first direction, data lines for supplying a data signal to the pixels, the data lines extending in a second direction crossing the first direction, and a first dummy part in the non-display area, adjacent to an outermost pixel, connected to an outermost data line of the display area, forming a parasitic capacitor with the outermost pixel, and including a first dummy data line and a first dummy power pattern extending in parallel to the data lines.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: July 11, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yang Wan Kim, Ji Hyun Ka, Tae Hoon Kwon, Byung Sun Kim, Hyung Jun Park, Su Jin Lee, Jae Yong Lee, Jin Tae Jeong, Seung Ji Cha
  • Patent number: 11657762
    Abstract: A pixel and an organic light emitting diode (OLED) display using the pixel are disclosed. The pixel includes a driving transistor for transmitting a driving current, an OLED configured to receive a first portion of the driving current and a bypass transistor configured to receive a second portion of the driving current.
    Type: Grant
    Filed: November 29, 2021
    Date of Patent: May 23, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: Jin-Tae Jeong, Won-Kyu Kwak
  • Publication number: 20230145041
    Abstract: The present disclosure relates to an apparatus and method for gene amplification. The apparatus for gene amplification may include: an upper main body comprising a first inlet to receive a sealing solution, a second inlet to receive a sample solution, and an upper passage that allows the sample solution and the sealing solution to move by capillary action; a lower main body disposed to oppose the upper main body, and having a lower passage through which the sealing solution moves by capillary action after being injected from the first inlet of the upper main body; a gene amplification chip configured to be inserted between the upper main body and the lower main body; and a porous medium configured to be inserted between the upper main body and the lower main body.
    Type: Application
    Filed: March 2, 2022
    Publication date: May 11, 2023
    Applicants: SAMSUNG ELECTRONICS CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Won Jong JUNG, Ho-Young Kim, Hyeong Seok Jang, Kak Namkoong, Tae Jeong Kim, Jae Hong Lee, Sohyun Jung
  • Patent number: 11640788
    Abstract: A stage including: an output circuit connected to a first node and a second node; an input connected to a third node and a fourth node; and a plurality of signal processors between the output and the input, the plurality of signal processors electrically connecting the first node and the third node and electrically connecting the second node and the fourth node, wherein the input includes: a seventh transistor connected between a first input terminal and the fourth node and having a gate electrode connected to a second input terminal; a plurality of eighth transistors serially connected between the third node and the second input terminal and having gate electrodes connected to the fourth node; and a ninth transistor connected between the third node and a second power source and having a gate electrode connected to the second input terminal.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: May 2, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung Kyu Lee, Seung Ji Cha, Ji Hyun Ka, Tae Hoon Kwon, Min Ku Lee, Jin Tae Jeong
  • Publication number: 20230119752
    Abstract: A pixel includes an organic light emitting diode (OLED), a pixel circuit, and first and second transistors. The OLD includes a cathode electrode connected to a second power source. The pixel circuit includes a driving transistor having a gate electrode initialized by a third power source. The driving transistor controls the amount of current flowing from a first power source to the second power source via the OLED. The first transistor is connected between a fourth power source and the second power source and an anode electrode of the OLED. The first transistor is turned on based on a scan signal is supplied to a scan line. The second transistor is connected between a data line and the pixel circuit. The second transistor is turned on when the scan signal is supplied to the ith scan line.
    Type: Application
    Filed: December 8, 2022
    Publication date: April 20, 2023
    Inventors: JIN TAE JEONG, MIN KU LEE, JI HYUN KA, TAE HOON KWON, SEUNG KYU LEE, SEUNG JI CHA
  • Patent number: 11631730
    Abstract: A display apparatus includes a substrate including a display area, a peripheral area surrounding the display area, a function-adding area, of which at least a portion is surrounded by the display area, and a detour area disposed between tine display area and the function-adding area. The display apparatus includes a plurality of pixel circuits disposed in the display area. A plurality of driving lines are electrically connected to the pixel circuits and extend in a direction in the display area. A first detour line is disposed in the detour area and is electrically connected to a first driving line. A second detour line is disposed in the detour area. The second detour line is electrically connected to a second driving line and is disposed in a different layer from the first detour line.
    Type: Grant
    Filed: November 5, 2020
    Date of Patent: April 18, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Ji-Hyun Ka, Seung-Kyu Lee, Hwan-Soo Jang, Jin-Tae Jeong
  • Patent number: 11616294
    Abstract: A communication method performed in an electronic device including a conductive pattern and the electronic device are provided. The electronic device includes a conductive pattern used as a radiator for wireless communication, a feeding unit connected with the conductive pattern, a ground unit connected with the conductive pattern, a first impedance matching circuit disposed in a first area adjacent to the feeding unit and connected to the conductive pattern, a second impedance matching circuit disposed in a second area adjacent to the conductive pattern and connected to the conductive pattern, and a control unit that matches impedance by controlling at least one of the first impedance matching circuit and the second impedance matching circuit by a closed-loop scheme.
    Type: Grant
    Filed: May 3, 2021
    Date of Patent: March 28, 2023
    Inventors: Min Sakong, Dong Ryul Shin, Yoon Jae Lee, Seong Tae Jeong, Jin Woo Jung
  • Publication number: 20230078362
    Abstract: A machine reading comprehension (MRC) question and answer providing method includes receiving a user question; analyzing the user question; selecting at least one document from at least one domain corresponding to an analyzed user question and searching for a passage, which is a candidate answer determined as being suitable for the user question, in the selected at least one document; obtaining at least one correct answer candidate value by inputting the user question and a corresponding passage into each of at least one MRC question and answer unit; and determining whether the at least one correct answer candidate value is a best answer.
    Type: Application
    Filed: November 18, 2022
    Publication date: March 16, 2023
    Applicant: 42 Maru Inc.
    Inventors: Dong Hwan KIM, Hyun Ok KIM, Woo Tae JEONG
  • Publication number: 20230046261
    Abstract: Power amplifier supply networks with harmonic terminations are disclosed. In certain embodiments, a power amplifier system includes a first power amplifier that amplifies a first radio frequency (RF) signal of a first fundamental frequency, a second power amplifier that amplifies a second RF signal of a second fundamental frequency, and a power amplifier supply network that distributes a power amplifier supply voltage to the first power amplifier at a first distribution node and to the second power amplifier at a second distribution node. The power amplifier supply network includes a first harmonic termination circuit connected to the first distribution node that provide an open circuit at about twice the first fundamental frequency, and a second harmonic termination circuit connected to the second distribution node and that provides an open circuit at about twice the fundamental frequency.
    Type: Application
    Filed: July 25, 2022
    Publication date: February 16, 2023
    Inventors: Bo Yu, Hyeong Tae Jeong, Bo Pan, Phi Nguyen Dang
  • Patent number: 11575734
    Abstract: An apparatus and a method for reducing power consumption of an Application Processor (AP) in an electronic device are provided. The electronic device includes a first processor for supporting a first Internet Protocol (IP) Multimedia Subsystem (IMS) protocol stack, and a second processor for supporting a second IMS protocol stack. The first processor includes an AP for processing a multimedia service, and the second processor includes at least one of a Communication Processor (CP), a Modem Processor (MP), and a Baseband Processor (BP) for processing a communication service.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: February 7, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Tae-Jeong Bae, Chin-Kyu Kang, Hye-Jeong Kim, Sang-Soo Lee
  • Publication number: 20230018432
    Abstract: A display device includes pixels coupled to first scan lines, second scan lines, emission control lines, and data lines; a first scan driver to supply a scan signal to each of the first scan lines at a first frequency to drive the display device at a first driving frequency, and to supply the scan signal to each of the first scan lines at a second frequency to drive the display device at a second driving frequency lower than the first driving frequency; a second scan driver to supply a scan signal to each of the second scan lines at the first frequency to drive the display device at the first driving frequency, and to supply the scan signal to each of the second scan lines at the second frequency to drive the display device at the second driving frequency; an emission driver to supply an emission control signal to each of the emission control lines at the first frequency; and a data driver to supply a data signal to each of the data lines in response to the scan signal supplied to each of the first scan lines
    Type: Application
    Filed: September 26, 2022
    Publication date: January 19, 2023
    Inventors: Kyong Hwan OH, Ji Hyun KA, Ki Myeong EOM, Hai Jung IN, Jin JEON, Won Kyu KWAK, Hyun LEE, Hwan Soo JANG, Jin Tae JEONG
  • Publication number: 20230010021
    Abstract: A display device includes a light emitting diode electrically connected between a driving voltage line and a common voltage line; a driving transistor electrically connected between the driving voltage line and the light emitting diode; a second transistor electrically connected between a first electrode of the driving transistor electrically connected to the driving voltage line and a data line; a first scan line electrically connected to a gate electrode of the second transistor; a third transistor electrically connected between a second electrode of the driving transistor electrically connected to the light emitting diode and a gate electrode of the driving transistor; and a connection electrode that connects the gate electrode of the driving transistor and the third transistor, wherein at least a part of a contact portion where the connection electrode contacts the third transistor does not overlap the first scan line.
    Type: Application
    Filed: September 9, 2022
    Publication date: January 12, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Min Hee CHOI, Ji-Eun LEE, Jin Tae JEONG, Yun Sik JOO
  • Publication number: 20230007058
    Abstract: Disclosed is a reaction display method performed by a computer apparatus including processing circuitry, the reaction display method including displaying, by the processing circuitry, a content sharing screen with a voice over Internet protocol (VoIP) call screen during a VoIP call, the content sharing screen including shared media content, and a user of the computer apparatus participating in the VoIP call, receiving, by the processing circuitry, a position at which a reaction is input from the user during the VoIP call, sending reaction information and the position to at least one other user participating in the VoIP call, the reaction information corresponding to the reaction, and displaying an indication of the reaction on the VoIP call screen or the content sharing screen based on the position.
    Type: Application
    Filed: September 12, 2022
    Publication date: January 5, 2023
    Applicant: LINE Plus Corporation
    Inventors: DeokYong AHN, Hwan KIM, Min Jeong KIM, Jaehyun LEE, Seongsu KIM, Kyoung Min KIM, Sanghyuk SUH, Jeongrok KIM, Tae Jeong LEE, Jeong Hyeon KWON, Keumryong KIM, Na Young KIM, Inah KIM, Jungjun PARK