Abstract: A touch sensing unit includes first touch electrodes, a first touch signal line, and a second touch signal line. The first touch electrodes are disposed in a touch sensor area. The first touch signal line is electrically connected to some of the first touch electrodes arranged in a first column. The second touch signal line is electrically connected to some of the first touch electrodes arranged in a second column different from the first column. The second touch signal line includes a first bent portion bent at least once in an intersection region of the first touch signal line and the second touch signal line.

Abstract: Provided herein is a display device including a base layer having a non-sensing area and a sensing area configured to surround the non-sensing area, a touch sensor disposed on the sensing area of the base layer, an optical structure disposed on the base layer, and a polarization layer disposed on the touch sensor so as to overlap the sensing area. The touch sensor and the optical structure include a first through hole located in the non-sensing area, and the non-sensing area includes a first area corresponding to the first through hole and a second area configured to surround the first area. The optical structure is disposed in the second area, and includes an optical pattern including a plurality of openings.

Abstract: A semiconductor device includes a time-to-digital converter (TDC) that receives a reference frequency signal and a feedback frequency signal, and outputs a first digital signal indicating a time difference between the reference frequency signal and the feedback frequency signal; a digital loop filter (DLF) that outputs a second digital signal generated by filtering the first digital signal; a multiplier circuit that outputs one of a third digital signal and a final test signal, the third digital signal generated by performing a multiplication operation on the second digital signal using a multiplication coefficient; a digital-controlled oscillator (DCO) that generates an oscillation signal having a frequency based on the output one of the third digital signal and the final test signal; and a loop gain calibrator (LGC) that receives the oscillation signal, generates a pair of test signals, and determines the multiplication coefficient using the pair of test signals.

Abstract: A method of operating a pixel clock generator (PCG), the method including generating N clock signals according to a control voltage signal, the N clock signals having different phases and N being a natural number; generating M frequency-divided clock signals based on the N clock signals, the M frequency-divided clock signals having different phases and M being a natural number greater than N; and generating a pixel clock signal based on at least two selected ones of the M frequency-divided clock signals.