Abstract: An image sensor is provided. The image sensor includes a well of a second conductivity type formed on an impurity layer of a first conductivity type, source and drain regions of the first conductivity type, formed in the well to be spaced apart from each other, a first photo diode of the first conductivity type formed in the well to overlap the source and drain regions, a second photo diode of the first conductivity type formed so as not to overlap the source and drain regions and formed to be adjacent to the first photo diode, and a gate electrode formed on the first and second photo diodes.

Abstract: A sub pixel includes a photodetector and a column line output circuit. The photodetector is configured to output an electrical signal based on a detected amount of photons. The column line output circuit is configured to generate an output signal based on the electrical signal. The output signal is one of a current from a current source and a comparison signal indicative of binary output data.

Abstract: An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Abstract: An image sensor comprises a substrate including a photodiode, and an insulation pattern structure making contact with the photodiode on the substrate. An anti-reflection pattern is formed on the insulation pattern structure and the substrate. The anti-reflection pattern includes a first opening through which the insulation pattern structure is exposed corresponding to the photodiode. A first insulation interlayer structure is formed on the anti-reflection pattern, and the first insulation interlayer structure includes at least one insulation layer and a second opening connected to the first opening. A metal wiring structure is formed in the insulation layer, and a transparent insulation pattern is formed in the first and second openings. A color filter is formed on the transparent insulation pattern, and a micro lens is formed on the color filter.

Abstract: A semiconductor integrated circuit device includes a semiconductor substrate including a main chip region and a pad region, a multi-layer pad structure on the pad region of the semiconductor substrate, a redistribution pad through the semiconductor substrate and in contact with a bottom surface of the multi-layer pad structure, the redistribution pad being electrically connected to the multi-layer pad structure, a trench belt through the semiconductor substrate and surrounding the redistribution pad, the trench belt electrically isolating the redistribution pad and a portion of the semiconductor substrate adjacent to the redistribution pad, and a connection terminal on the redistribution pad, the connection terminal electrically connecting the redistribution pad to an external source.

Abstract: An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Abstract: Disclosed is a image sensor (e.g., a CMOS image sensor) including pixels each having a transfer transistor and a drive transistor, in which the gate of at least one of the transistors has a boosting gate disposed over it comprised of a conductive film pattern with interposing an insulation film. Thus, a voltage applied to the boosting gate is capacitively coupled to at least one of the transfer gate of the transfer transistor and a drive gate of the drive transistor. The transfer gate is supplied with the sum of the transfer voltage and the boosting gate-coupling voltage as a result and there is no need for providing a high voltage generator for the image sensor. The dynamic range of operation may be enhanced if such a coupling voltage is applied to the drive gate of the drive transistor.

Abstract: Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Abstract: An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Abstract: A method of fabricating an image sensor according to example embodiments may include forming a photodiode in a photoelectric conversion region of a substrate and forming an etch stop layer on the substrate. The etch stop layer may be patterned to form an inner lens on the photoelectric conversion region and an etch stop layer pattern on a transistor region of the substrate. A metal interconnection structure may be formed on the inner lens and the etch stop layer pattern. Accordingly, the number of additional processes for fabricating an image sensor may be reduced.

Abstract: A CMOS image sensor may be provided. The CMOS image sensor may include at least one floating diffusion column line, a plurality of pixels, and/or a charge/voltage conversion circuit. The plurality of pixels may be connected to the floating diffusion column line in parallel. The charge/voltage conversion circuit may be connected to one end of the floating diffusion column line, and may detect a potential variation of the floating diffusion column line using a coupling capacitor.

Abstract: An image sensor includes a photoelectric conversion section in a semiconductor substrate, the photoelectric conversion section having a capping layer of a first conductivity type and a photodiode of a second conductivity type below the capping layer, the photodiode having an upper surface deeper than about 1 ?m, as measured from an upper surface of the semiconductor substrate, a charge detection section receiving charges stored in the photoelectric conversion through a charge transfer section and converting the received charges into respective electrical signals, a voltage application section adapted to apply voltage to the capping layer and to a lower portion of the semiconductor substrate to control a width of a depletion layer on the photodiode, and a signal operation section adapted to generate red, green, and blue, signals according to signals from the charge detection section.

Abstract: An image sensor includes a first type semiconductor layer, a second type semiconductor layer and a first type well. The first type semiconductor layer is formed on a semiconductor substrate and includes a plurality of pixels which receive external light and convert optical charges into an electrical signal. The second type semiconductor layer is supplied with a drain voltage to have a potential different from that of the first semiconductor layer, and the first type well controls a power source voltage (VDD) using the drain voltage.

Abstract: In a CMOS image sensor and method of fabricating the same, the CMOS image sensor is comprised of a pixel array generating image signals and a peripheral circuit processing the image signals. In the method, a substrate is provided having a pixel region and a peripheral circuit region. A photo-receiving element and at least one transistor are formed on the pixel region of the substrate and a transistor is formed on the peripheral circuit region of the substrate. A silicide barrier pattern is formed to cover a region where the photo-receiving element is formed. A silicide layer is formed on a predetermined region of the substrate. An interlevel insulation film is formed on the silicide barrier layer. At least one contact hole penetrating the interlevel insulation film is formed, the at least one contact hole exposing a predetermined region of the silicide layer.

Abstract: Disclosed is an image sensor and method of fabricating the same. The image sensor includes a photoelectric transformation region formed in a semiconductor substrate, and pluralities of interlayer dielectric films formed over the photoelectric transformation regions. The interlayer dielectric films contain multilevel interconnection layers. A color filter layer is disposed in a well region formed in the interlayer dielectric films over the photoelectric transformation region. A passivation layer is interposed between the color filter layer and the interlayer dielectric films.

Abstract: An image sensor comprises a substrate including a photodiode, and an insulation pattern structure making contact with the photodiode on the substrate. An anti-reflection pattern is formed on the insulation pattern structure and the substrate. The anti-reflection pattern includes a first opening through which the insulation pattern structure is exposed corresponding to the photodiode. A first insulation interlayer structure is formed on the anti-reflection pattern, and the first insulation interlayer structure includes at least one insulation layer and a second opening connected to the first opening. A metal wiring structure is formed in the insulation layer, and a transparent insulation pattern is formed in the first and second openings. A color filter is formed on the transparent insulation pattern, and a micro lens is formed on the color filter.

Abstract: An image sensor comprises a substrate including a photodiode, and an insulation pattern structure making contact with the photodiode on the substrate. An anti-reflection pattern is formed on the insulation pattern structure and the substrate. The anti-reflection pattern includes a first opening through which the insulation pattern structure is exposed corresponding to the photodiode. A first insulation interlayer structure is formed on the anti-reflection pattern, and the first insulation interlayer structure includes at least one insulation layer and a second opening connected to the first opening. A metal wiring structure is formed in the insulation layer, and a transparent insulation pattern is formed in the first and second openings. A color filter is formed on the transparent insulation pattern, and a micro lens is formed on the color filter.

Abstract: An CMOS image sensor includes a photodiode region generating electrical charges in response to incident light-received thereat. In one example, the CMOS image sensor further includes first and second transfer gates adapted to prevent or substantially prevent the electrical charges from overflowing into a floating diffusion region or a storage diffusion region located on opposite sides of the photodiode region. In this example, a read diffusion region is formed in the semiconductor substrate on an opposite side of the storage diffusion region relative to the photodiode region and a reset diffusion region is formed in the semiconductor substrate on an opposite side of the floating diffusion region relative to the photodiode region. The read diffusion region may be electrically connected to the floating diffusion region by a connection line.

Abstract: An improved complementary metal oxide semiconductor (CMOS) image sensor which may decrease the occurrence of dark current is provided. The CMOS image sensor includes a plurality of isolation regions formed in a substrate and a first impurity-doped region formed between the isolation region and separated from a side surface of the isolation region by a predetermined interval.

Abstract: An image sensor may include a first common column line and/or at least one first pixel. The at least one first pixel may be connected to the first common column line. The at least one first pixel may include a first photoelectron conversion region, a first transfer gate, a first overflow gate, and/or a first overflow drain region. The first transfer gate may be between the first photoelectron conversion region and the first common column line. The first overflow gate may be spaced from the first transfer gate. The first photoelectron conversion region may be between the first overflow gate and the first transfer gate. The first overflow drain region may be on an opposite side of the first photoelectron conversion region with respect to the first transfer gate. The first overflow gate may be between the first overflow drain region and the first photoelectron conversion region.