Patents by Inventor Tae Sung Jang

Tae Sung Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090026478
    Abstract: There is provided a semiconductor light emitting device having excellent light extraction efficiency to efficiently reflect light moving into the device by increasing the total reflectivity of a reflective layer. A semiconductor light emitting device according to an aspect of the invention includes: a substrate, a reflective electrode, a first conductivity semiconductor layer, an active layer, and a second conductivity type semiconductor layer that are sequentially stacked.
    Type: Application
    Filed: July 22, 2008
    Publication date: January 29, 2009
    Inventors: Sang Ho YOON, Su Yeol Lee, Doo Go Baik, Seok Beom Choi, Tae Sung Jang, Jong Gun Woo
  • Patent number: 7372078
    Abstract: A vertical GaN-based LED includes: an n-electrode; a light-emitting structure in which an n-type GaN layer, an active layer, and a p-type GaN layer are sequentially formed under the n-electrode; a p-electrode formed under the light-emitting structure; a passivation layer formed to cover the side and bottom surfaces of the light-emitting structure and expose a predetermined portion of the p-electrode, the passivation layer being formed of a distributed Bragg reflector (DBR); a plating seed layer formed under the passivation layer and the p-electrode; and a support layer formed under the plating seed layer.
    Type: Grant
    Filed: October 16, 2006
    Date of Patent: May 13, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Sung Jang, Su Yeol Lee, Seok Beom Choi
  • Publication number: 20080093618
    Abstract: Provided is a vertical LED including an n-electrode; an n-type GaN layer formed under the n-electrode, the n-type GaN layer having a surface coming in contact with the n-electrode, the surface having a Ga+N layer containing a larger amount of Ga than that of N; an active layer formed under the n-type GaN layer; a p-type GaN layer formed under the active layer; a p-electrode formed under the p-type GaN layer; and a structure support layer formed under the p-electrode.
    Type: Application
    Filed: August 14, 2007
    Publication date: April 24, 2008
    Inventors: Su Yeol Lee, Sang Ho Yoon, Doo Go Baik, Seok Beom Choi, Tae Sung Jang, Jong Gun Woo
  • Publication number: 20080048206
    Abstract: A method of manufacturing a vertical GaN-based LED comprises forming a light emission structure in which an n-type GaN-based semiconductor layer, an active layer, and a p-type GaN-based semiconductor layer are sequentially laminated on a substrate; etching the light emission structure such that the light emission structure is divided into units of LED; forming a p-electrode on each of the divided light emission structures; filling a non-conductive material between the divided light emission structures; forming a metal seed layer on the resulting structure; forming a first plated layer on the metal seed layer excluding a region between the light emission structures; forming a second plated layer on the metal seed layer between the first plated layers; separating the substrate from the light emission structures; removing the non-conductive material between the light emission structures exposed by separating the substrate; forming an n-electrode on the n-type GaN-based semiconductor layer; and removing portions
    Type: Application
    Filed: May 1, 2007
    Publication date: February 28, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Su Yeol LEE, Bang Won OH, Doo Go BAIK, Tae Sung JANG, Jong Gun WOO, Seok Beom CHOI, Sang Ho YOON, Dong Woo KIM, In Tae YEO
  • Publication number: 20080042149
    Abstract: A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat.
    Type: Application
    Filed: March 28, 2007
    Publication date: February 21, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Ho YOON, Su Yeol LEE, Doo Go BAIK, Seok Beom CHOI, Tae Sung JANG, Jong Gun WOO
  • Patent number: 7317745
    Abstract: The present invention relates to a multi-wavelength laser diode, in which an oscillating structure includes a semiconductor substrate, and a lower cladding layer, an active layer and a ridge formed in their order on the semiconductor substrate. A first metal layer is formed on a first face of the oscillating structure including one end of the ridge, and made of a metal having a high reflectivity in a first wavelength range of at least a predetermined wavelength. A second metal layer is formed on the first metal layer, the second metal layer being made of a metal having a high reflectivity in a second wavelength range under the predetermined wavelength. The multi-wavelength laser diode can improve-the reflective layer structure to achieve a high reflectivity in the entire visible light range.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: January 8, 2008
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Tae Sung Jang, Hee Seok Choi, Sang Deog Cho, Dong Min Jeon
  • Patent number: 5896324
    Abstract: A method for detecting an overvoltage signal applied to a semiconductor memory device address pin reduces stress on the device and simplifies the testing process by dividing the voltage of the overvoltage signal and comparing it to a reference voltage, thereby generating a difference signal. The difference signal is buffered by a drive stage which generates a test mode output signal that places the memory device in a test mode. An overvoltage detection circuit for implementing this method includes a comparison signal generator having a resistive voltage divider for dividing the overvoltage signal and generating a comparison signal. A differential amplifier compares the comparison signal to a reference signal from a reference signal generator. The differential amplifier generates a difference signal which is coupled to a drive stage which generates a test mode output signal. The comparison signal generator, the differential amplifier, and the drive stage can be enabled in response to a test mode enable signal.
    Type: Grant
    Filed: May 23, 1997
    Date of Patent: April 20, 1999
    Assignee: Samsung Electronics, Co., Ltd.
    Inventors: Tae-sung Jang, Chan-jong Park
  • Patent number: 5359560
    Abstract: A row redundancy circuit for use in a semiconductor memory device. The row redundancy circuit providing fuse boxes to repair defective normal memory cells even in the adjacent normal memory cell arrays.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: October 25, 1994
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dong-Il Suh, Tae-Sung Jang, Dae-Je Chin