Patents by Inventor Tai Chen

Tai Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230245808
    Abstract: Described herein is a manufacturing method of a magnetic particle. First, deionized water, an organic solvent, a hydrophilic polymer, a lipid-soluble initiator, and at least two monomers are placed in a reactor and then stirred for polymerizing the at least two monomers into a copolymer to form a knobby copolymer core. Next, a polymer layer is formed to cover the knobby copolymer core, wherein the polymer layer has at least one functional group. Thereafter, a magnetic substance precursor is adsorbed by the knobby copolymer core covered with the polymer layer to form a magnetic substance layer. Further, a silicon-based layer may be additionally formed to cover the magnetic substance layer.
    Type: Application
    Filed: March 16, 2023
    Publication date: August 3, 2023
    Applicant: Industrial Technology Research Institute
    Inventors: Chien-An Chen, Cheng-Tai Chen, Pei-Shin Jiang
  • Patent number: 11711499
    Abstract: A projection system and a projection method are provided. The projection system includes a projection device, a streaming device, and a control device. The projection device includes a first image input port and a second image input port. The streaming device is electrically connected to the first image input port of the projection device and is coupled to the projection device in a detachable manner. The control device is communicatively connected to the streaming device. The control device transmits a first command signal to the streaming device, so that the projection device projects image data from the streaming device. The projection method may be executed by the projection system. The projection system and the projection method of the disclosure provide a user with more convenient operation environment and operation interface.
    Type: Grant
    Filed: March 17, 2021
    Date of Patent: July 25, 2023
    Assignee: CORETRONIC CORPORATION
    Inventors: Shun-Tai Chen, Chen Hsiang Shih, Chen-Yi Hong, Yu-Sheng Lee
  • Publication number: 20230223837
    Abstract: A protection circuit including an auxiliary winding, a rectifier unit, the filter unit, a voltage divider unit and a controller is provided. The auxiliary winding is configured to induce an AC voltage. The rectifier unit is coupled to the auxiliary winding and configured to rectify the AC voltage into a DC voltage. The filter unit is coupled to the rectifier unit and configured to filter the DC voltage into a DC filter voltage. The voltage divider unit is coupled to the rectifier unit and the filter unit to transmit the DC filter voltage. The controller is coupled to the voltage divider unit and configured to detect a partial voltage of the DC filter voltage and detect whether to activate a protection mechanism according to the partial voltage.
    Type: Application
    Filed: April 15, 2022
    Publication date: July 13, 2023
    Inventors: Wei-Ting LIN, Han-Ju CHIANG, Chih-Tai CHEN
  • Publication number: 20230216493
    Abstract: An output stage of an Ethernet transmitter is provided. The output stage is coupled to a resistor and includes a first output terminal, a second output terminal, a first transistor, and a first transistor group. The resistor is coupled between the first output terminal and the second output terminal. The first transistor has a first source, a first drain, and a first gate, the first source being coupled to a first reference voltage and the first drain being coupled to the second output terminal. The first transistor group is coupled to the first reference voltage and the first output terminal. The first transistor group includes multiple transistors which are connected in parallel, and the magnitude of the current flowing to the first output terminal is related to the number of transistors that are turned on.
    Type: Application
    Filed: December 5, 2022
    Publication date: July 6, 2023
    Inventors: CHIEN-HUI TSAI, HUNG-CHEN CHU, YUNG-TAI CHEN
  • Publication number: 20230216460
    Abstract: A transmitter circuit is provided. The transmitter circuit has an input port, a first transmission node, a second transmission node, a third transmission node, and a fourth transmission node and includes a first operational amplifier, a first output stage, a first resistor-capacitor network, a first switch group coupled between the first resistor-capacitor network and the input port, a first impedance matching circuit coupled to the first output stage, the first transmission node, and the second transmission node, a second operational amplifier, a second output stage, a second resistor-capacitor network, a second switch group coupled between the second resistor-capacitor network and the input port, and a second impedance matching circuit coupled to the second output stage, the third transmission node, and the fourth transmission node.
    Type: Application
    Filed: December 5, 2022
    Publication date: July 6, 2023
    Inventors: Chien-Hui TSAI, Hung-Chen CHU, Yung-Tai CHEN, Sheng-Yang HO
  • Publication number: 20230188102
    Abstract: An amplifier circuit includes a continuous-time linear equalizer, an adjustable gain circuit and a filter circuit. The continuous-time linear equalizer includes a first high-pass path, a first low-pass path, a second high-pass path, and a second low-pass path. The first high-pass path is used to increase a gain of a high-frequency part of a first signal source, and the second high-pass path is used to increase a gain of a high-frequency part of a second signal source. The filter circuit is used to amplify and filter the first signal source and the second signal source, and includes a fully-differential operational amplifier, a first filter network, and a second filter network.
    Type: Application
    Filed: December 14, 2022
    Publication date: June 15, 2023
    Inventors: CHIA-WEI YU, YUNG-TAI CHEN, TSUNG-EN WU, CHENG-HSIEN LI, SHENG-YANG HO
  • Publication number: 20230187426
    Abstract: An integrated circuit layout and an integrated circuit layout method for a filter are provided. The method includes: determining a structure of a target filter circuit that includes a capacitor and a first optional component; reserving a first circuit region; disposing the first optional component in the first circuit region, and electrically connecting the first optional component, through a plurality of first wires located in a first metal layer, to a plurality of first external nodes that are outside the first circuit region; electrically connecting the plurality of first external nodes to a plurality of second wires located in a second metal layer, respectively, in which the second wires are disposed around the first circuit region; and disposing the capacitor in the first circuit region and above the first optional component.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 15, 2023
    Inventors: CHIA-WEI YU, YUNG-TAI CHEN, CHAO-YANG CHEN, SHENG-YANG HO
  • Patent number: 11627386
    Abstract: An information capturing device includes a setting storage unit, a positioning unit, an audiovisual recording unit and a control unit. The setting storage unit stores a fence setting of a hotspot. The positioning unit, coupled to the setting storage unit, detects a current position, determines whether the current position is within a first geographic boundary defined by the fence setting, and outputs an activation notification when the current position is within the first geographic boundary. The control unit, coupled to the positioning unit and the audiovisual recording unit, activates the audiovisual recording according to the activation notification to perform audiovisual recording so as to capture environmental data.
    Type: Grant
    Filed: August 13, 2021
    Date of Patent: April 11, 2023
    Assignee: GETAC TECHNOLOGY CORPORATION
    Inventor: Min-Tai Chen
  • Publication number: 20230072830
    Abstract: A display device is provided. The display device includes a device housing, a knob, a restriction unit and a screen panel. The knob is rotatably connected to the device housing, wherein the knob comprises a latch and a plurality of teeth, the knob is adapted to be rotated between a first knob location and a second knob location, and when the knob is in the first knob location, the latch protrudes from the device housing, and when the knob is in the second knob location, the latch is received in the device housing. The restriction unit is disposed in the device housing, wherein the restriction unit is adapted to be connected to one of the teeth to restrict the knob. The screen panel is detachably connected to the device housing. The display device can be easily detached from a display system.
    Type: Application
    Filed: April 13, 2022
    Publication date: March 9, 2023
    Inventors: An-Hsiu LEE, Chih-Ping CHEN, Yuan-Tai CHEN, Chun-Hong KUO
  • Publication number: 20230061932
    Abstract: A method for forming a chip package structure is provided. The method includes removing a first portion of a substrate to form a first recess in the substrate. The method includes forming a buffer structure in the first recess. A first Young's modulus of the buffer structure is less than a second Young's modulus of the substrate. The method includes forming a first wiring structure over the buffer structure and the substrate. The method includes bonding a chip package to the first wiring structure. The chip package has an interposer substrate and a chip structure over the interposer substrate, and a first corner of the interposer substrate and a second corner of the chip structure overlap the buffer structure in a top view of the chip package and the buffer structure.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Chin-Hua WANG, Po-Chen LAI, Ping-Tai CHEN, Che-Chia YANG, Yu-Sheng LIN, Po-Yao LIN, Shin-Puu JENG
  • Patent number: 11584009
    Abstract: A collaborative-robot control system is provided in the invention. The collaborative-robot control system includes a plurality of test machines, a plurality of collaborative robots, a first control system and a second control system. The plurality of test machines are configured in a plurality of paths. When the second control system assigns a first collaborative robot of the plurality of collaborative robots in a waiting area to a first test machine in a first path of the plurality of paths and the first collaborative robot is being blocked by a second collaborative robot of the plurality of collaborative robots in the first path, the second control system generates a push-forward command and transmits the push-forward command to the first control system. The first control system sends the push-forward command to the second collaborative robot to order the second collaborative robot to leave the first path first.
    Type: Grant
    Filed: May 20, 2020
    Date of Patent: February 21, 2023
    Assignee: WINBOND ELECTRONICS CORP.
    Inventors: Te-Wei Chu, Chen-Meng Cheng, Chun-Ming Huang, Kuang-Tai Chen, Yu-Jen Chang, Tsung-Hsien Wu
  • Patent number: 11555871
    Abstract: A method of detecting a biological sample includes the following steps. A magnetic sensor chip is provided, wherein the magnetic sensor chip includes a substrate and a magnetic sensing layer located on the substrate. Probes are connected to the magnetic sensor chip. A sample solution containing biological samples labeled with a first marker is provided on the magnetic sensor chip, so that the biological samples labeled with the first marker are hybridized with the probes. Magnetic beads labeled with a second marker are provided on the magnetic sensor chip, so that the magnetic beads labeled with the second marker are bound onto the biological samples labeled with the first marker. A signal sensed by the magnetic sensing layer is detected by a magnetic sensor.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: January 17, 2023
    Assignee: Industrial Technology Research Institute
    Inventors: Cheng-Tai Chen, Shih-Ya Chen, Yi-Chen Liu, Ching-Fang Lu, Chia-Chen Chang, Erh-Fang Lee
  • Publication number: 20230006652
    Abstract: A transmission-end impedance matching circuit operates according to a signal of an overvoltage signal source and includes a first level shifter, a voltage generating circuit, and an impedance matching circuit. The first level shifter generates a first conversion voltage according to a source signal and operates between a first high voltage and a ground voltage. The voltage generating circuit generates a second high voltage according to the first conversion voltage, the first high voltage, and a medium voltage. The impedance matching circuit includes a second level shifter, a transistor, and two resistors. The second level shifter generates a gate voltage according to the second high voltage, a low voltage, and an input signal. The transistor is turned on/off according to the gate voltage and has a withstand voltage lower than the first high voltage. Each of the two resistors is coupled between the transistor and a differential signal transmission end.
    Type: Application
    Filed: April 25, 2022
    Publication date: January 5, 2023
    Inventors: CHIEN-HUI TSAI, HUNG-CHEN CHU, YUNG-TAI CHEN
  • Publication number: 20230006660
    Abstract: A level shifter can achieve a level shift by a wide margin. The level shifter includes a latch circuit, a clamping circuit, a protection circuit, and an input circuit. The latch circuit is coupled between a high-voltage terminal and a pair of output terminals for outputting a pair of output signals. The clamping circuit is coupled between a medium-voltage terminal and the pair of output terminals and limits the minimum voltage of the pair of output signals to the medium voltage. The protection circuit is set between the latch circuit and the input circuit, and prevents an excessive voltage drop between the input circuit and the pair of output terminals. The input circuit includes an input transistor pair coupled between the protection circuit and a low-voltage terminal having a low voltage. The input transistor pair receives a pair of input signals and operates accordingly.
    Type: Application
    Filed: April 25, 2022
    Publication date: January 5, 2023
    Inventors: CHIEN-HUI TSAI, HUNG-CHEN CHU, YUNG-TAI CHEN
  • Publication number: 20220367591
    Abstract: Provided is a display panel, including a substrate, multiple pixel circuits, an insulating layer, multiple first electrodes, a first isolation structure, and a second isolation structure. The pixel circuits are located on the substrate. The insulating layer is located on the pixel circuits and has multiple through holes. The first electrodes are located on the insulating layer and are respectively electrically connected to the pixel circuits through the through holes. The first isolation structure is located on the insulating layer and overlaps the through holes. The second isolation structure includes multiple separating parts and multiple cover parts. The separating parts and the first isolation structure at least partially overlap, and the cover parts respectively overlap the through holes and the first isolation structure.
    Type: Application
    Filed: November 5, 2021
    Publication date: November 17, 2022
    Applicant: Au Optronics Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Yu-Chuan Liao, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20220307138
    Abstract: The present document discloses a gas inlet device (21, 21a-21k) for use in a reactor for gas treatment of a substrate. The gas inlet device comprises an inlet niche having a back wall (233), and a side wall (234, 235) extending in a downstream direction (F) from the back wall (233) towards an inlet niche opening (212), an impingement surface (243), a gas orifice (210), which is configured to direct a gas flow towards the impingement surface (243), and a taper surface (244, 245), extending downstream of the impingement surface (243), such that a flow gap (213) having, along the downstream direction (F), gradually increasing cross sectional area, is formed between the side wall (234, 235) and the taper surface (244, 245). The document further discloses a mixing device, a gas outlet device a reactor and the use of such reactor.
    Type: Application
    Filed: June 10, 2019
    Publication date: September 29, 2022
    Inventors: Olof Kordina, Jr-Tai Chen, Martin Eriksson
  • Publication number: 20220262875
    Abstract: A display panel includes a substrate, a first isolation structure, a second isolation structure and a plurality of light emitting structures. The first isolation structure is disposed on the substrate and includes a plurality of through holes. The second isolation substrate is laminated on the first isolation substrate and fills up the plurality of through holes of the first isolation substrate. The plurality of light emitting structures are disposed on the substrate and are isolated from each other via the second isolation structure.
    Type: Application
    Filed: July 26, 2021
    Publication date: August 18, 2022
    Applicant: Au Optronics Corporation
    Inventors: Kuo-Jui Chang, Wen-Tai Chen, Chi-Sheng Chiang, Chien-Sen Weng, Ming-Wei Sun
  • Publication number: 20220205993
    Abstract: A detection method of multiple analytes includes the following. A microparticle is provided. The microparticle is coupled with at least one first ligand, and includes a body and a plurality of first protrusions formed on a surface of the body. Next, the microparticle is mixed with a variety of analytes to form a first complex. Thereafter, the first complex is mixed with a variety of second ligands carrying a variety of first labels, such that the variety of second ligands bind to the variety of analytes in the first complex and form a second complex. Lastly, the variety of first labels in the variety of second ligands in the second complex are detected.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 30, 2022
    Applicant: Industrial Technology Research Institute
    Inventors: Wen-Ting Chiang, Chien-An Chen, Cheng-Tai Chen
  • Patent number: 11369014
    Abstract: The invention relates to a light beam generating device and method, and a projection device. The light beam generating device is configured to receive a color control signal and generate a target light beam having a target color, and includes a plurality of drivers, a current signal generating circuit, and a control circuit. The drivers respectively drive a plurality of light-emitting elements according to a plurality of current signals, wherein the plurality of light-emitting elements collectively generate the target light beam. The current signal generating circuit is coupled to the drivers and generates the plurality of current signals according to the color control signal corresponding to the target color. The control circuit is coupled to the drivers and controls whether each driver is enabled according to the color control signal.
    Type: Grant
    Filed: February 3, 2021
    Date of Patent: June 21, 2022
    Assignee: Coretronic Corporation
    Inventors: Wen-Hsin Chang, Chung-Lin Ke, Shun-Tai Chen, Tung-Yi Lu
  • Patent number: RE49285
    Abstract: The present document discloses a semiconductor device structure (1) comprising a SiC substrate (11), an Inx1Aly1Ga1-x1-y1N buffer layer (13), wherein x1=0-1, y1=0-1 and x1+y1=1, and an Inx2Aly2Ga1-x2-y2N nucleation layer (12), wherein x2=0-1, y2=0-1 and x2+y2=1, sandwiched between the SiC substrate (11) and the buffer layer (13). The buffer layer (13) presents a rocking curve with a (102) peak having a FWHM below 250 arcsec, and the nucleation layer (12) presents a rocking curve with a (105) peak having a FWHM below 200 arcsec, as determined by X-ray Diffraction (XRD). Methods of making such a semiconductor device structure are disclosed.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: November 8, 2022
    Assignee: SWEGAN AB
    Inventors: Erik Janzén, Jr-Tai Chen