Patents by Inventor Tai Yu
Tai Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240178102Abstract: A package includes a frontside redistribution layer (RDL) structure, a semiconductor die on the frontside RDL structure, and a backside RDL structure on the semiconductor die including a first RDL, and a backside connector extending from a distal side of the first RDL and including a tapered portion having a width that decreases in a direction away from the first RDL, wherein the tapered portion includes a contact surface at an end of the tapered portion. A method of forming the package may include forming the backside redistribution layer (RDL) structure, attaching a semiconductor die to the backside RDL structure, forming an encapsulation layer around the semiconductor die on the backside RDL structure, and forming a frontside RDL structure on the semiconductor die and the encapsulation layer.Type: ApplicationFiled: April 21, 2023Publication date: May 30, 2024Inventors: Chun-Ti LU, Hao-Yi TSAI, Chiahung LIU, Ken-Yu CHANG, Tzuan-Horng LIU, Chih-Hao CHANG, Bo-Jiun LIN, Shih-Wei CHEN, Pei-Rong NI, Hsin-Wei HUANG, Zheng GangTsai, Tai-You LIU, Steve SHIH, Yu-Ting HUANG, Steven SONG, Yu-Ching WANG, Tsung-Yuan YU, Hung-Yi KUO, CHung-Shi LIU, Tsung-Hsien CHIANG, Ming Hung TSENG, Yen-Liang LIN, Tzu-Sung HUANG, Chun-Chih CHUANG
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Publication number: 20240170053Abstract: A latch formed from a memory cell includes a clock input terminal configured to receive a clock signal, complementary first and second data terminals, and a latch circuit. The latch circuit has first and second inverters. The first inverter has an input terminal coupled to the first data terminal, and the second inverter has an input terminal coupled to the second data terminal. A first pass gate transistor is coupled between an output terminal of the second inverter and the first data terminal. A second pass gate transistor is coupled between an output terminal of the first inverter and the second data terminal. The first and second pass gate transistors each have a gate terminal coupled to the clock input terminal. The input terminal of the first inverter is not directly connected to the output terminal of the second inverter, and the input terminal of the second inverter is not directly connected to the output terminal of the first inverter.Type: ApplicationFiled: January 26, 2024Publication date: May 23, 2024Inventors: Hua-Hsin Yu, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh
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Publication number: 20240157469Abstract: The present application provides a method for determining a stability of a welding equipment. The method includes acquiring initial welding images of the welding equipment; obtaining at least one welding spot position of each of at least one welded workpiece in each initial welding image by processing the initial welding images; determining a welding center position of each welded workpiece based on the at least one welding spot position of each welded workpiece, and obtaining welding center positions of all welded workpieces comprised in the initial welding images; and determining a stability of welding equipment based on the welding center positions of all welded workpieces. The method determines whether the welding equipment is stable by analyzing the welding images, thereby improving an accuracy of a detection of a stability of the welding equipment.Type: ApplicationFiled: November 13, 2023Publication date: May 16, 2024Inventors: YEN TSAN, TSUNG-JU LIN, CHEN-TING WU, MING-TAO LUO, JUN-MING HUANG, TAI-YU CHOU, QUAN-XI CHEN
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Patent number: 11984485Abstract: A semiconductor device includes a substrate, a gate structure on the substrate, a source/drain (S/D) region and a contact. The S/D region is located in the substrate and on a side of the gate structure. The contact lands on and connected to the S/D region. The contact wraps around the S/D region.Type: GrantFiled: March 3, 2022Date of Patent: May 14, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Hsien Cheng, Jr-Hung Li, Tai-Chun Huang, Tze-Liang Lee, Chung-Ting Ko, Jr-Yu Chen, Wan-Chen Hsieh
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Patent number: 11983289Abstract: A method and a system for managing login information of a computing system during a debugging process are disclosed. The login information is composed according to a number of roles and their associated policies. Some roles have higher authorized levels to view sensitive information. To protect privacy, a technician who access the computing system will not be able to view all content of information. If this restriction prevents the technician to debug the system, the technician can request an upgrade. A new login information with a higher authorized level will be temporarily granted to the technician that allows the technician to view and access more content of information.Type: GrantFiled: December 28, 2021Date of Patent: May 14, 2024Assignee: Kyocera Document Solutions Inc.Inventor: Tai Yu Chen
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Patent number: 11977897Abstract: An information processing method includes, when an electronic apparatus is booted, obtaining current parameter information of a target hard disk drive and sending the current parameter information to a baseboard management controller (BMC). The current parameter information of the target hard disk drive indicates current mounting position of the target hard disk drive on a backplane (BP).Type: GrantFiled: December 15, 2021Date of Patent: May 7, 2024Assignee: LENOVO (BEIJING) LIMITEDInventor: Tai-Yu Chiu
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Publication number: 20240142878Abstract: Example implementations described herein include a laser source and associated methods of operation that can balance or reduce uneven beam profile problem and even improve plasma heating efficiency to enhance conversion efficiency and intensity for extreme ultraviolet radiation generation. The laser source described herein generates an auxiliary laser beam to augment a pre-pulse laser beam and/or a main-pulse laser beam, such that uneven beam profiles may be corrected and/or compensated. This may improve an intensity of the laser source and also improve an energy distribution from the laser source to a droplet of a target material, effective to increase an overall operating efficiency of the laser source.Type: ApplicationFiled: January 10, 2024Publication date: May 2, 2024Inventors: Tai-Yu CHEN, Shang-Chieh CHIEN, Sheng-Kang YU, Li-Jui CHEN, Heng-Hsin LIU
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Patent number: 11963527Abstract: The disclosure provides for methods of repelling, directing, altering the behavior, and controlling an insect by utilizing a compound or composition described herein. The disclosure also provides for methods of promoting the health of an insect by repelling a pest that preys on insect and/or by providing an antibiotic or nutritional supplement composition to an insect. The disclosure also provides for a composition including at least one repelling, controlling, or directing compound or composition described herein together with an insecticide, herbicide, fungicide, or miticide. Compounds, compositions, seeds, and plants useful in these methods are also described.Type: GrantFiled: December 10, 2018Date of Patent: April 23, 2024Assignee: BASF CorporationInventors: Tai-Teh Wu, Dick Rogers, Jian Zhang, Chi Yu Roy Chen, Robert Croft, Ronald Reichert, William G. Hairston
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Patent number: 11967570Abstract: A semiconductor package includes a base comprising a top surface and a bottom surface that is opposite to the top surface; a first semiconductor chip mounted on the top surface of the base in a flip-chip manner; a second semiconductor chip stacked on the first semiconductor chip and electrically coupled to the base by wire bonding; an in-package heat dissipating element comprising a dummy silicon die adhered onto the second semiconductor chip by using a high-thermal conductive die attach film; and a molding compound encapsulating the first semiconductor die, the second semiconductor die, and the in-package heat dissipating element.Type: GrantFiled: March 4, 2022Date of Patent: April 23, 2024Assignee: MediaTek Inc.Inventors: Chia-Hao Hsu, Tai-Yu Chen, Shiann-Tsong Tsai, Hsing-Chih Liu, Yao-Pang Hsu, Chi-Yuan Chen, Chung-Fa Lee
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Patent number: 11955949Abstract: A resonator includes: interdigital transducer (IDT) including first electrode including first base on piezoelectric substrate and extended in reference direction, and first protrusions connected to the first base and extended in direction intersecting with the reference direction, and second electrode including second base on the piezoelectric substrate and extended in the reference direction, and second protrusions connected to the second base and extended in direction intersecting with the reference direction, each of the second protrusions extended to have one of the first protrusions inserted between the second protrusion and another second protrusion adjacent to the second protrusion, wherein a width of each of first specific protrusions included between one end of the IDT and first position at first distance from the one end, among the first protrusions and the second protrusions, decreases from first specific protrusion closest to the first position toward first specific protrusion closest to the one eType: GrantFiled: May 14, 2021Date of Patent: April 9, 2024Assignee: WISOL CO., LTD.Inventors: Toshihiko Kawamoto, Ryota Sato, Sang Tai Yu, Je Cheol Lee
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Patent number: 11951766Abstract: Disclosed is an equal divider, including a mainframe and a plurality of indicator plates, wherein the mainframe is mainly made up of a plurality of first connecting rods and a plurality of second connecting rods pivoted by a plurality of pivoting structures to form a scissor structure. The mainframe is formed with a plurality of first pivoting parts and a plurality of second pivoting parts. The first pivoting parts and the second pivoting parts pivot the first connecting rods and the second connecting rods. The indicator plate is configured between the first connecting rod and the second connecting rod. The indicator plate is configured with a protruding indicating part. Each indicator plate is configured with a long through groove. The second pivoting part goes through the through groove. The indicating parts and the first pivoting parts maintain a fixed distance along the second axial direction.Type: GrantFiled: September 9, 2022Date of Patent: April 9, 2024Inventor: Tai-Yu Lee
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Publication number: 20240103378Abstract: The present disclosure provides an extreme ultraviolet (EUV) lithography system including a radiation source and an EUV control system integrated with the radiation source. The EUV control system includes a 3-dimensional diagnostic module (3DDM) designed to collect a laser beam profile of a laser beam from the radiation source in a 3-dimensional (3D) mode, an analysis module designed to analyze the laser beam profile, a database designed to store the laser beam profile, and an EUV control module designed to adjust the radiation source. The analysis module is coupled with the database and the EUV control module. The database is coupled with the 3DDM and the analysis module. The EUV control module is coupled with the analysis module and the radiation source.Type: ApplicationFiled: November 30, 2023Publication date: March 28, 2024Inventors: Tai-Yu CHEN, Tzu-Jung PAN, Kuan-Hung CHEN, Sheng-Kang YU, Shang-Chieh CHIEN, Li-Jui CHEN, Heng-Hsin LIU
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Publication number: 20240083193Abstract: Disclosed is an equal divider, including a mainframe and a plurality of indicator plates, wherein the mainframe is mainly made up of a plurality of first connecting rods and a plurality of second connecting rods pivoted by a plurality of pivoting structures to form a scissor structure. The mainframe is formed with a plurality of first pivoting parts and a plurality of second pivoting parts. The first pivoting parts and the second pivoting parts pivot the first connecting rods and the second connecting rods. The indicator plate is configured between the first connecting rod and the second connecting rod. The indicator plate is configured with a protruding indicating part. Each indicator plate is configured with a long through groove. The second pivoting part goes through the through groove. The indicating parts and the first pivoting parts maintain a fixed distance along the second axial direction.Type: ApplicationFiled: September 9, 2022Publication date: March 14, 2024Inventor: Tai-Yu LEE
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Publication number: 20240082967Abstract: Disclosed is an auxiliary adjusting and abutting device for a material cutting machine, including a base, a sliding seat, an adjusting assembly, a ruler rod and a connecting and positioning piece, wherein the sliding seat is fitted on the guiding groove of the base in a sliding manner, and through the adjusting assembly, it can be adjusted to move back or forth for a specific distance. The ruler rod is sleeved inside the connecting tube part and rotary tube of the adjusting assembly in the shape of a hollow through tube. The connecting and positioning piece has a released mode and locked mode. When in the locked mode, its locking end is locked on the ruler rod so that it moves simultaneously with the ruler rod and the sliding seat; whereas in the released mode, so that the ruler rod can move relatively back and forth inside the adjusting assembly.Type: ApplicationFiled: September 9, 2022Publication date: March 14, 2024Inventor: Tai-Yu LEE
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Publication number: 20240081154Abstract: A method for fabricating a semiconductor device includes the steps of: providing a substrate, wherein the substrate comprises a MRAM region and a logic region; forming a magnetic tunneling junction (MTJ) on the MRAM region; forming a top electrode on the MTJ; and then performing a flowable chemical vapor deposition (FCVD) process to form a first inter-metal dielectric (IMD) layer around the top electrode and the MTJ.Type: ApplicationFiled: November 8, 2023Publication date: March 7, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Tai-Cheng Hou, Fu-Yu Tsai, Bin-Siang Tsai, Da-Jun Lin, Chau-Chung Hou, Wei-Xin Gao
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Publication number: 20240071428Abstract: A device is disclosed and includes an input stage circuit, a switching circuit, and a first latch circuit. The input stage circuit generates a first input signal having a first voltage and a second input signal based on a third input signal. The switching circuit operates in response to a first control signal, and adjusts a voltage level of a first data line according to the first input signal and a voltage level of a second data line according to the second input signal. The first latch circuit is coupled to the switching circuit by the first data line and the second data line. The first latch circuit latches a data in response to the first control signal and a second control signal, and adjusts the voltage level of the first data line based on a second voltage different from the first voltage.Type: ApplicationFiled: November 8, 2023Publication date: February 29, 2024Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hua-Hsin YU, Hung-Jen LIAO, Cheng-Hung LEE, Hau-Tai SHIEH
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Patent number: 11915743Abstract: A latch formed from a memory cell includes a clock input terminal configured to receive a clock signal, complementary first and second data terminals, and a latch circuit. The latch circuit has first and second inverters. The first inverter has an input terminal coupled to the first data terminal, and the second inverter has an input terminal coupled to the second data terminal. A first pass gate transistor is coupled between an output terminal of the second inverter and the first data terminal. A second pass gate transistor is coupled between an output terminal of the first inverter and the second data terminal. The first and second pass gate transistors each have a gate terminal coupled to the clock input terminal. The input terminal of the first inverter is not directly connected to the output terminal of the second inverter, and the input terminal of the second inverter is not directly connected to the output terminal of the first inverter.Type: GrantFiled: March 15, 2021Date of Patent: February 27, 2024Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hua-Hsin Yu, Cheng Hung Lee, Hung-Jen Liao, Hau-Tai Shieh
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Patent number: 11906902Abstract: Example implementations described herein include a laser source and associated methods of operation that can balance or reduce uneven beam profile problem and even improve plasma heating efficiency to enhance conversion efficiency and intensity for extreme ultraviolet radiation generation. The laser source described herein generates an auxiliary laser beam to augment a pre-pulse laser beam and/or a main-pulse laser beam, such that uneven beam profiles may be corrected and/or compensated. This may improve an intensity of the laser source and also improve an energy distribution from the laser source to a droplet of a target material, effective to increase an overall operating efficiency of the laser source.Type: GrantFiled: March 21, 2022Date of Patent: February 20, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tai-Yu Chen, Shang-Chieh Chien, Sheng-Kang Yu, Li-Jui Chen, Heng-Hsin Liu
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Publication number: 20230422525Abstract: A semiconductor package includes a bottom substrate and a top substrate space apart from the bottom substrate such that the bottom substrate and the top substrate define a gap therebetween. A logic die and a memory die are mounted on a top surface of the bottom substrate in a side-by-side fashion. The logic die may have a thickness not less than 125 micrometers. A connection structure is disposed between the bottom substrate and the top substrate around the logic die and the memory die to electrically connect the bottom substrate with the top substrate. A sealing resin fills in the gap between the bottom substrate and the top substrate and sealing the logic die, the memory die, and the connection structure in the gap.Type: ApplicationFiled: May 31, 2023Publication date: December 28, 2023Applicant: MEDIATEK INC.Inventors: Ta-Jen Yu, Wen-Chin Tsai, Isabella Song, Che-Hung Kuo, Hsing-Chih Liu, Tai-Yu Chen, Shih-Chin Lin, Wen-Sung Hsu
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Patent number: 11852978Abstract: The present disclosure provides a method for an extreme ultraviolet (EUV) lithography system that includes a radiation source having a laser device configured with a mechanism to generate an EUV radiation. The method includes collecting a laser beam profile of a laser beam from the laser device in a 3-dimensional (3D) mode; collecting an EUV energy distribution of the EUV radiation generated by the laser beam in the 3D mode; performing an analysis to the laser beam profile and the EUV energy distribution, resulting in an analysis data; and adjusting the radiation source according to the analysis data to enhance the EUV radiation.Type: GrantFiled: June 7, 2022Date of Patent: December 26, 2023Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Tai-Yu Chen, Tzu-Jung Pan, Kuan-Hung Chen, Sheng-Kang Yu, Shang-Chieh Chien, Li-Jui Chen, Heng-Hsin Liu