Patents by Inventor Taiichiro Watanabe

Taiichiro Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240047504
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; a plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Application
    Filed: September 14, 2023
    Publication date: February 8, 2024
    Applicant: SONY GROUP CORPORATION
    Inventors: Taiichiro WATANABE, Akihiro YAMADA, Hideo KIDO, Hiromasa SAITO, Keiji MABUCHI, Yuko OHGISHI
  • Publication number: 20240047490
    Abstract: There is provided a solid-state image pickup device including: a semiconductor substrate; a photodiode formed in the semiconductor substrate; a transistor having a gate electrode part or all of which is embedded in the semiconductor substrate, the transistor being configured to read a signal electric charge from the photodiode via the gate electrode; and an electric charge transfer layer provided between the gate electrode and the photodiode.
    Type: Application
    Filed: October 19, 2023
    Publication date: February 8, 2024
    Applicant: SONY GROUP CORPORATION
    Inventors: Ryosuke NAKAMURA, Fumihiko KOGA, Taiichiro WATANABE
  • Publication number: 20230420482
    Abstract: Provided are a light receiving element and an electronic apparatus that prevent generation of a false signal due to light emission caused by a circuit. The light receiving element includes a plurality of pixels. Each of the plurality of pixels includes: a photoelectric conversion layer that photoelectrically converts incident light; a signal reading circuit including an in-pixel transistor that is provided on a side opposite to a light incident side surface of the photoelectric conversion layer, amplifies signal charge generated by the photoelectric conversion layer, and reads the signal charge out of a pixel array; and a metal junction that bonds the photoelectric conversion layer and the signal reading circuit. The metal junction covers the in-pixel transistor when viewed from the light incident side surface of the photoelectric conversion layer.
    Type: Application
    Filed: October 12, 2021
    Publication date: December 28, 2023
    Inventors: Yasuhisa TOCHIGI, Taiichiro WATANABE, Fumihiko KOGA
  • Publication number: 20230388672
    Abstract: An imaging device includes: an effective pixel region that includes a plurality of imaging elements-A, amplifies signal charges generated by photoelectric conversion, and reads the signal charges into a drive circuit; and an optical black region that includes a plurality of imaging elements-B, surrounds the effective pixel region, and outputs optical black that serves as the reference for black level. In the imaging device, the photoelectric conversion layer forming the plurality of imaging elements-A and the plurality of imaging elements-B is a common photoelectric conversion layer, the common photoelectric conversion layer is located on an outer side of the optical black region, and extends toward an outer edge region surrounding the optical black region, and an outer edge electrode is disposed in the outer edge region.
    Type: Application
    Filed: July 20, 2023
    Publication date: November 30, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tetsuro TAKADA, Taiichiro Watanabe
  • Publication number: 20230370738
    Abstract: A solid-state imaging device according to an embodiment of the disclosure includes a first electrode, a second electrode, a photoelectric conversion layer, and a voltage applier. The first electrode includes a plurality of electrodes independent from each other. The second electrode pis disposed opposite to the first electrode. The photoelectric conversion layer is disposed between the first electrode and the second electrode. The voltage applier applies different voltages to at least one of the first electrode or the second electrode during a charge accumulation period and a charge non-accumulation period.
    Type: Application
    Filed: July 21, 2023
    Publication date: November 16, 2023
    Inventors: TAIICHIRO WATANABE, TETSUJI YAMAGUCHI, YUSUKE SATO, FUMIHIKO KOGA
  • Patent number: 11817473
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: November 14, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Publication number: 20230343807
    Abstract: A solid-state imaging element includes a pixel including a first imaging element, a second imaging element, a third imaging element, and an on-chip micro lens 90. The first imaging element includes a first electrode 11, a third electrode 12, and a second electrode 16. The pixel further includes a third electrode control line VOA connected to the third electrode 12 and a plurality of control lines 62B connected to various transistors included in the second and third imaging elements and different from the third electrode control line VOA. In the pixel, a distance between the center of the on-chip micro lens 90 included in the pixel and any one of the plurality of control lines 62B included in the pixel is shorter than a distance between the center of the on-chip micro lens 90 included in the pixel and the third electrode control line VOA included in the pixel.
    Type: Application
    Filed: April 3, 2023
    Publication date: October 26, 2023
    Inventors: Nobuhiro KAWAI, Hideaki TOGASHI, Fumihiko KOGA, Tetsuji YAMAGUCHI, Shintarou HIRATA, Taiichiro WATANABE, Yoshihiro ANDO
  • Publication number: 20230335573
    Abstract: A photodetection device includes: a photoelectric conversion layer provided in a first substrate; a diffusion region provided in a second substrate attached to the first substrate, the diffusion region storing electric charge resulting from photoelectric conversion at the photoelectric conversion layer; and a coupling section having a multilayer structure including a via and a wiring layer, the coupling section being provided to extend from the first substrate to the second substrate and electrically coupling the photoelectric conversion layer and the diffusion region. The coupling section is provided in a manner in which, as viewed in a plane from a direction normal to a principal surface of each of the first substrate and the second substrate, a plane region of each layer is included in a plane region of a layer that is largest in plane region.
    Type: Application
    Filed: June 3, 2021
    Publication date: October 19, 2023
    Inventors: YASUHISA TOCHIGI, TAIICHIRO WATANABE, FUMIHIKO KOGA
  • Patent number: 11792541
    Abstract: A solid-state imaging device according to an embodiment of the disclosure includes a first electrode, a second electrode, a photoelectric conversion layer, and a voltage applier. The first electrode includes a plurality of electrodes independent from each other. The second electrode is disposed opposite to the first electrode. The photoelectric conversion layer is disposed between the first electrode and the second electrode. The voltage applier applies different voltages to at least one of the first electrode or the second electrode during a charge accumulation period and a charge non-accumulation period.
    Type: Grant
    Filed: September 2, 2022
    Date of Patent: October 17, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taiichiro Watanabe, Tetsuji Yamaguchi, Yusuke Sato, Fumihiko Koga
  • Patent number: 11792542
    Abstract: An imaging device includes: an effective pixel region that includes a plurality of imaging elements-A, amplifies signal charges generated by photoelectric conversion, and reads the signal charges into a drive circuit; and an optical black region that includes a plurality of imaging elements-B, surrounds the effective pixel region, and outputs optical black that serves as the reference for black level. In the imaging device, the photoelectric conversion layer forming the plurality of imaging elements-A and the plurality of imaging elements-B is a common photoelectric conversion layer, the common photoelectric conversion layer is located on an outer side of the optical black region, and extends toward an outer edge region surrounding the optical black region, and an outer edge electrode is disposed in the outer edge region.
    Type: Grant
    Filed: August 31, 2022
    Date of Patent: October 17, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tetsuro Takada, Taiichiro Watanabe
  • Publication number: 20230317750
    Abstract: An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
    Type: Application
    Filed: June 1, 2023
    Publication date: October 5, 2023
    Inventors: Taiichiro WATANABE, Fumihiko KOGA, Kyosuke ITO, Hideaki TOGASHI, Yusaku SUGIMORI
  • Patent number: 11670659
    Abstract: An imaging element includes a photoelectric conversion unit including a first electrode 11, a photoelectric conversion layer 13, and a second electrode 12 that are stacked, in which the photoelectric conversion unit further includes a charge storage electrode 14 arranged apart from the first electrode 11 and arranged to face the photoelectric conversion layer 13 through an insulating layer 82, and when photoelectric conversion occurs in the photoelectric conversion layer 13 after light enters the photoelectric conversion layer 13, an absolute value of a potential applied to a part 13C of the photoelectric conversion layer 13 facing the charge storage electrode 14 is a value larger than an absolute value of a potential applied to a region 13B of the photoelectric conversion layer 13 positioned between the imaging element and an adjacent imaging element.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: June 6, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taiichiro Watanabe, Fumihiko Koga, Kyosuke Ito, Hideaki Togashi, Yusaku Sugimori
  • Patent number: 11621290
    Abstract: A solid-state imaging element includes a pixel including a first imaging element, a second imaging element, a third imaging element, and an on-chip micro lens 90. The first imaging element includes a first electrode 11, a third electrode 12, and a second electrode 16. The pixel further includes a third electrode control line VOA connected to the third electrode 12 and a plurality of control lines 62B connected to various transistors included in the second and third imaging elements and different from the third electrode control line VOA. In the pixel, a distance between the center of the on-chip micro lens 90 included in the pixel and any one of the plurality of control lines 62B included in the pixel is shorter than a distance between the center of the on-chip micro lens 90 included in the pixel and the third electrode control line VOA included in the pixel.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: April 4, 2023
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Nobuhiro Kawai, Hideaki Togashi, Fumihiko Koga, Tetsuji Yamaguchi, Shintarou Hirata, Taiichiro Watanabe, Yoshihiro Ando
  • Publication number: 20230076380
    Abstract: An imaging device includes: an effective pixel region that includes a plurality of imaging elements-A, amplifies signal charges generated by photoelectric conversion, and reads the signal charges into a drive circuit; and an optical black region that includes a plurality of imaging elements-B, surrounds the effective pixel region, and outputs optical black that serves as the reference for black level. In the imaging device, the photoelectric conversion layer forming the plurality of imaging elements-A and the plurality of imaging elements-B is a common photoelectric conversion layer, the common photoelectric conversion layer is located on an outer side of the optical black region, and extends toward an outer edge region surrounding the optical black region, and an outer edge electrode is disposed in the outer edge region.
    Type: Application
    Filed: August 31, 2022
    Publication date: March 9, 2023
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tetsuro TAKADA, Taiichiro WATANABE
  • Publication number: 20220415961
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Applicant: Sony Group Corporation
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Publication number: 20220417459
    Abstract: A solid-state imaging device according to an embodiment of the disclosure includes a first electrode, a second electrode, a photoelectric conversion layer, and a voltage applier. The first electrode includes a plurality of electrodes independent from each other. The second electrode is disposed opposite to the first electrode. The photoelectric conversion layer is disposed between the first electrode and the second electrode. The voltage applier applies different voltages to at least one of the first electrode or the second electrode during a charge accumulation period and a charge non-accumulation period.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Inventors: TAIICHIRO WATANABE, TETSUJI YAMAGUCHI, YUSUKE SATO, FUMIHIKO KOGA
  • Publication number: 20220352222
    Abstract: There is provided a solid-state image pickup device including: a semiconductor substrate; a photodiode formed in the semiconductor substrate; a transistor having a gate electrode part or all of which is embedded in the semiconductor substrate, the transistor being configured to read a signal electric charge from the photodiode via the gate electrode; and an electric charge transfer layer provided between the gate electrode and the photodiode.
    Type: Application
    Filed: May 23, 2022
    Publication date: November 3, 2022
    Applicant: SONY GROUP CORPORATION
    Inventors: Ryosuke NAKAMURA, Fumihiko KOGA, Taiichiro WATANABE
  • Patent number: 11489001
    Abstract: A solid-state imaging device includes: plural photodiodes formed in different depths in a unit pixel area of a substrate; and plural vertical transistors formed in the depth direction from one face side of the substrate so that gate portions for reading signal charges obtained by photoelectric conversion in the plural photodiodes are formed in depths corresponding to the respective photodiodes.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: November 1, 2022
    Assignee: SONY CORPORATION
    Inventors: Taiichiro Watanabe, Akihiro Yamada, Hideo Kido, Hiromasa Saito, Keiji Mabuchi, Yuko Ohgishi
  • Publication number: 20220336521
    Abstract: An imaging device is provided. The imaging device may include a substrate having a first photoelectric conversion unit and a second photoelectric conversion unit at a light-incident side of the substrate. The second photoelectric conversion unit may include a photoelectric conversion layer, a first electrode, a second electrode above the photoelectric conversion layer, a third electrode, and an insulating material between the third electrode and the photoelectric conversion layer, wherein a portion of the insulating material is between the first electrode and the third electrode.
    Type: Application
    Filed: April 29, 2022
    Publication date: October 20, 2022
    Applicant: SONY GROUP CORPORATION
    Inventors: Hideaki TOGASHI, Fumihiko KOGA, Tetsuji YAMAGUCHI, Shintarou HIRATA, Taiichiro WATANABE, Yoshihiro ANDO, Toyotaka KATAOKA, Satoshi KEINO, Yukio KANEDA
  • Patent number: 11477404
    Abstract: An imaging device includes: an effective pixel region that includes a plurality of imaging elements-A, amplifies signal charges generated by photoelectric conversion, and reads the signal charges into a drive circuit; and an optical black region that includes a plurality of imaging elements-B, surrounds the effective pixel region, and outputs optical black that serves as the reference for black level. In the imaging device, the photoelectric conversion layer forming the plurality of imaging elements-A and the plurality of imaging elements-B is a common photoelectric conversion layer, the common photoelectric conversion layer is located on an outer side of the optical black region, and extends toward an outer edge region surrounding the optical black region, and an outer edge electrode is disposed in the outer edge region.
    Type: Grant
    Filed: May 17, 2019
    Date of Patent: October 18, 2022
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tetsuro Takada, Taiichiro Watanabe