Patents by Inventor Taisei Jin

Taisei Jin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device with lead structure on principal surface of chip
    Patent number: 5869888
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 9, 1999
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita
  • Semiconductor device
    Patent number: 5714405
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: September 26, 1996
    Date of Patent: February 3, 1998
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Systems, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita
  • Semiconductor device with lead structure within the planar area of the device
    Patent number: 5583375
    Abstract: A semiconductor device having inner leads secured via insulating adhesive films to the principal surface of a semiconductor chip and electrically connected to the respective external terminals of the semiconductor chip. The semiconductor device that can be about the size of the chip is so configured that an outer lead is continuously extended from each inner lead up to the rear surface opposite to the principal surface of the semiconductor chip in order to hold the leads and an external device in conduction.
    Type: Grant
    Filed: December 14, 1992
    Date of Patent: December 10, 1996
    Assignees: Hitachi, Ltd., Hitachi Microcomputer System, Ltd.
    Inventors: Kunihiro Tsubosaki, Michio Tanimoto, Kunihiko Nishi, Masahiro Ichitani, Shunji Koike, Kazunari Suzuki, Ryosuke Kimoto, Ichiro Anjoh, Taisei Jin, Akihiko Iwaya, Gen Murakami, Masamichi Ishihara, Junichi Arita